I don't think one would really need a TCXO : there would not be sub ppm stability anyway.
The low pass filter may mave to be lower cross over, so that there is more averating over the steps from the DAC. 1/10 second would be only some 100 LSB steps (for 20 min cycle). I doubt one would need a faster reaction so the filter would likely be better more at some 1 Hz - still a parameter to trim for the final version.
The gain stage from 2.5 V to 20 V would not need to be super stable - just avoid extra crurrent noise from the resistos. One may still consider a different reference, possibly with lower noise, though higher long time drift. This may be as crazy as a 18 V battery stack. One point one does not want is something like popcorn noise.
With a giid timing resolution from the µC one may not really need the DDS generator for the clock. Some of the STM32 µCs offer PWM with very fine time resolution (sub ns range), that could be used instead.