Author Topic: JFET input stage low noise amplifier  (Read 17994 times)

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Online Gerhard_dk4xp

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Re: JFET input stage low noise amplifier
« Reply #75 on: October 22, 2023, 01:21:48 am »
Unfortunately, discrete JFETs are no longer as fashionable as they used to be.

There are new JFETS from TI:  (interesting thread)

<        https://www.diyaudio.com/community/threads/ultra-low-noise-jfets-from-texas-instruments.375079/        >

Gerhard
 
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Offline CurtisSeizertTopic starter

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Re: JFET input stage low noise amplifier
« Reply #76 on: November 02, 2023, 03:49:55 pm »
I was in need of a weekend diversion, and was inspired by this thread... see attached simple amplifier schematic with NSD chart, using 4x JFE2140 and OPA210.

Might be useful for someone needing to put something together in a hurry?

Nice. I have played with these a lot, and I think the sweet spot for drain current is around 0.5 mA per JFET if you're interested in low frequencies. That said, the zero tempco drain current is in the neighborhood of 7 mA for the JFE2140, so the tempco may be a bit worse at lower drain current. Note that this is not properly reflected in TI's model, which has VTOTC=-0.45m. I haven't run the simulation, but I think that would put you in the neighborhood of 1.2 nV/rtHz NSD. Also, the offset and drift averages for each pair are not centered around zero, so you can get a little better matching if you flip half the pairs around. This could help with the increased tempco from running at lower drain current.
 
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