Author Topic: JFET input stage low noise amplifier  (Read 18345 times)

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Offline CurtisSeizertTopic starter

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JFET input stage low noise amplifier
« on: March 15, 2022, 05:25:19 am »
I have been working on a low noise preamp based on the design by Cannata et al. (http://link.aip.org/link/doi/10.1063/1.3258197?ver=pdfcov) that I thought I would share in hopes that someone might benefit from it. The input stage is a cascoded diff pair using an IF3602 matched JFET pair with a high impedance current mirror load to keep gain high up to 100 kHz.  The key features are:

-Film caps at the input (no leakage testing of Al electolytics required, possible because of the low current noise of the JFET input pair)
-Offset trim to compensate for Vgs differences between the two JFETs of the pair
-HP filter resistor shorted when switching sources to decrease settling time
-Antiparallel NPN pair for low leakage input protection
-Switchable gain (80 and 100 dB)
-Switchable 4th order Butterworth filter stage (<12 Hz, <100 kHz)
-Runs on two series 3s Li batteries, draw is around 35 mA.

It is not without issues, but as far as I can tell none of those issues compromise the validity of its measurements.  The key component values have all been optimized in LTSpice. The HP filter at the input has -3 dB at around 20 mHz, so it is usable over a wide range of frequencies, which I have confirmed using a two stage active attenuator made from two inverting amplifiers to give -80 dB with low impedance.  The low frequency noise is higher than a previous version I built using resistive loads in the diff pair, and I am not totally sure if that is from (a) more thermal EMF from running the diff pair at higher drain current, (b) more junctions/suboptimal layout giving more thermal EMF, or (c) higher 1/f corner frequency for the particular IF3602 in the more recent revision.  I have bodged in a JFE2140 JFET pair on this board, but I have not fully tested that one yet.  The noise floor will be higher, but probably still usable for most things.  Power supplies are LT3042 and LT3093 using a 22 uF Cset to minimize LF noise, but I have not been impressed with the LF noise measurements I got with those.

I am working on a revision at the moment.  I may switch to an LT1678 as the op amp on the input stage to enable +/-5 V rails, possibly a different power supply arrangement, and fix some of the bugs. 

I have made some noise power spectra by capturing the the voltage trace on a 34465A and using a python script to plot the fft (using scipy.signal.welch).  I have attached the noise floor from 0.1 Hz to 10 kHz here, and I'll add some more later.  The deficiencies of my shielding setup will be pretty clear in that spectrum.  I am happy to provide the design files to anyone who is interested, but I won't put gerbers up until I have fixed some of the issues and tested the revision. This is not my area of expertise, so if anyone has suggestions or sees errors, please let me know.

Curtis
 
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Online Kleinstein

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Re: JFET input stage low noise amplifier
« Reply #1 on: March 15, 2022, 08:48:02 am »
The circuit looks nice.

I found a few small points for possible improvements / mistakes:
The capacitor C12 should likely better go towards ground instead of towards the 7.5 V supply. If the supply is very clean this would not make a large difference and the filtering is more for the higher frequency part. Ideally the supply decoupling would include an extra series resistor for the circuit parts, not just a capacitor. With a low frequency only crcuit this is likely not that relevant though.

The resistors R17 and R20 could be combined to a single resistor.

For the extra low frequency noise, the resistors R7 and R14 could contribute with current noise. Especially thick film resistors that have a significant DC voltage will show some extra 1/f noise that can become relevant. So R7 and R14 should be thin film types preferrably not the smallest form factor.
Trimming of R7 or R14 could be used to reduce the temperature effect on the JFET. This would reduce the effect of thermal fluctuations at the FETs.

I would personally skip the connection from wiper of RV1 to the center of the 2 2 ohms resistors. The trimmers wiper resistance would this way be less relevant.
The output may want some extra resistance in series if the switch resistance is below some 100 Ohms to isolate capacitove loading the the OPs.

The capacitors at the filter stage should not be X7R or similar types (hard to tell from the picture if they are C0G). Film caps may allow slightly larger values than C0G, otherwise C0G is good.

There is no need for R19/R36 to be high accurracy or otherwise special type.

For the input protection could also use a BAV199 dual diode instead of the 2 transistors. This low leakage diode is quite common.

For the supply one may get away with a little less overall voltage, possibly a slightly asymmetric (like -2.5 V and +7.5 V). This could reduce the overall power consumption and thus heat related problems.
 
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Offline MK

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Re: JFET input stage low noise amplifier
« Reply #2 on: March 15, 2022, 09:16:02 am »
 
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Offline magic

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Re: JFET input stage low noise amplifier
« Reply #3 on: March 15, 2022, 10:35:49 am »
A random idea: are you sure that flicker noise of the BJTs isn't contributing meaningfully?
Collector current noise is generally suppressed by local feedback loops (enough?), but base current noise of Q4 and Q5 is out of any loop.
 
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Online Kleinstein

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Re: JFET input stage low noise amplifier
« Reply #4 on: March 15, 2022, 11:02:34 am »
The noise current from the Q3 Q4 Q5 is rather similar: it can add current to the drain sides. Similar the voltage noise of Q3 can contribute, though usually still not relevant as the emitter resistors are large.

With the base current noise the question is if it is really worth to have Q4. It makes the current more symmetric, but adds some current noise. With the rather large emitter resistors the symmetry is quite good anyway even without Q4.  Some adjustment with a parallel resistor to R7/R14 should be as good or better. Perfect symmetry in the currents may still not be the point of lowest drift / temperature sensitivity.
 

Offline magic

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Re: JFET input stage low noise amplifier
« Reply #5 on: March 15, 2022, 12:12:56 pm »
The reason I thought about base current noise is because Burr-Brown used JFET cascodes in some of their JFET opamps (even though bootstrapped bipolar cascodes are cheaper and had been known for decades at the time) and mentioned the problem in US4550291.

You can add Q3 to the list of potential offenders, because its base current isn't suppressed by the Wilson mirror. At this point it looks like removal of Q4 can only decrease noise (but worsen DC balance and maybe gain). A simple test for whether BJTs are problem is to try lower noise parts - perhaps 2222/2907 due to their larger geometry, or dedicated LN bipolars like Toshiba 2SC3324/2SA1312.

R10 could be another potential noise injection point (by modulating tail current). I'm not sure if Q5 even adds anything? The 1st stage doesn't need to have ludicrous gain, just enough to suppress U1 voltage noise. Common mode rejection is not a large problem either if input levels are limited to <±0.5V anyway.

The figure of merit for U1 noise is minimization of en/G1 + in/gm1, where G1/gm1 is the gain/transconductance of the 1st stage. It's not clear if bipolar U1 wouldn't be better. A wideband opamp is helpful indeed if high bandwidth is to be attained.
 

Online Kleinstein

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Re: JFET input stage low noise amplifier
« Reply #6 on: March 15, 2022, 02:42:43 pm »
I think the main incentive for using JFETs for the cascode is that one gets away without the extra voltage shift for the base. So no 2 V ref or R10, if there is suitable threshold.

G1/gm1 is rather large - at least for the lower frequency part. One could also look at the ouput impedance that U1A sees : between a current mirror and the cacode this is a rather high impedance (> 100 K). So a FET type OP definitely makes more sense than a BJT based one. Due to the high gain from the discrete part low noise in general is not that important for this OP. The ADA4625 is noise wise way overkill here. The LT1678 is less suitable because of the current noise, but could still be good enough.

Already on its own the ADA4625 (possibly 2 channels in parallel) could make a rather good low noise amplifier. The supply current is rather high and it runs quite warm, which could be a problem.
 

Offline magic

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Re: JFET input stage low noise amplifier
« Reply #7 on: March 15, 2022, 05:09:41 pm »
I think the main incentive for using JFETs for the cascode is that one gets away without the extra voltage shift for the base. So no 2 V ref or R10, if there is suitable threshold.
That's a valid reason in discrete design, but it doesn't explain Burr-Brown. On IC, die area matters more than component count. JFETs are large, JFETs capable of high drain current at high negative Vgs are larger still.

OPA445 even uses an NPN emitter follower + series resistor to level-shift its P-ch JFET cascode gates (schematic in old datasheets, die image here). That being said, it is not a particularly low noise opamp, so I suppose they used JFET cascodes for lack a of good PNP device on this noncomplementary BiFET process. Unfortunately, we don't have teardowns of nice stuff like OPA111 or OPA2107 and to be completely fair, while they did have dielectrically isolated JFETs, I don't know if they had good PNP available on that process. The newer OPA627 uses several BJTs in the input stage signal path, so the whole cascode current noise thing could be a red herring after all - perhaps false justification for patent on an economically important circuit topology.

G1/gm1 is rather large - at least for the lower frequency part. One could also look at the ouput impedance that U1A sees : between a current mirror and the cacode this is a rather high impedance (> 100 K). So a FET type OP definitely makes more sense than a BJT based one. Due to the high gain from the discrete part low noise in general is not that important for this OP. The ADA4625 is noise wise way overkill here. The LT1678 is less suitable because of the current noise, but could still be good enough.
You are correct, I will rephrase:
A bipolar, or perhaps high-speed oriented rather than low noise JFET part, could be good enough, or even better, if factors like cost, bandwidth and BW/$ are added into consideration ;)

The formula I posted is exactly the input-referred voltage noise contribution of U1, under assumptions:
- in is the differential noise current between the input pins, rather than either individual ground-referenced noise current
- gm1 is the differential transconductance, but it happens to be numerically equal to single-ended gm of each JFET
- the + is RMS sum
 

Offline CurtisSeizertTopic starter

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Re: JFET input stage low noise amplifier
« Reply #8 on: March 15, 2022, 05:17:32 pm »
Thanks for the detailed analysis! I will have to take more time than I have over lunch to dig into the thread MK linked. The motivation for changing to something like the LT1678 would be to get rid of the requirement for 2.5-3V headroom that comes with the ADA4625.  I agree that op-amp is probably overkill, but I decided to play it safe given the BOM cost of this project (admittedly not helped by having the 4625 there).  The nice thing about having a JFET op amp is the low current noise going through R19, and there is minimal cost difference between the 4625-1 and 4625-2

The cascode is not only there for gain - clamping Vds for Q2 is meant to limit the amount of heat dissipated on the part. I opted for BJT because of better matching, but the matching on the JFE2140 is probably good enough to put it there.

The configuration of the source resistors R9, R13, and RV1 is to keep options open for trimming. The Vgs differential on the IF3602 I used was about 3 mV (gm was about 50 mS averaged between 1.5 and 4 mA), but I wanted to be able to keep the source resistance as low as possible for noise while considering the limited availability of trimmers with the same footprint as the Vishay 1280G.

Regarding the mirror, I have seen some references to using resistive loads in long tailed pairs for low noise (from memory in AoE chapter 3 and the 4625 data sheet).  In LTSpice, adding the mirror decreased the input referred noise, and it did not show a significant contribution from those transistors.  That said, I am more confident in the accuracy (and relevance) of my measurements than I am of the simulation results.  The reason for having the "full-Wilson" mirror there was maintaining gain up to 100 kHz.  Without the op amp, the gain of that structure is about 85 dB itself with a -3 dB around 250 kHz. I cannot confirm that it goes past 100 kHz in actual measurements because I limited the bandwidth of the gain stages with feedback capacitors, but the passband is pretty flat up to 100 kHz. I will try to build up some test circuits when I get a chance to see if I can get a feel for whether the mirror is contributing to noise.  I am out of IF3602 at the moment (and until May apparently), but I've got some THAT300s that should work for building a test setup.

For comparison, here is the circuit I used the first time around.  The reason for the IF4500 setting the tail current was that it was what I had in stock.  The LF noise performance was better for that previous version, and the key difference in the spectrum (to my eye) is the lower 1/f corner, but that gives RMS noise of 5.3 nV for the resistive load hybrid and 8.5 nV for the current mirror version. The cascode stage in the previous version was also biased relative to ground because I was more concerned about clamping Vgs than limiting the Miller effect at such a low bandwidth. And yes, I did use another ada4625-2 in the filter stage.

Curtis

 

Offline magic

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Re: JFET input stage low noise amplifier
« Reply #9 on: March 15, 2022, 05:43:30 pm »
The nice thing about having a JFET op amp is the low current noise going through R19, and there is minimal cost difference between the 4625-1 and 4625-2.
Note that R19 is paralled with C16-R17, but that's not a lot of consolation - that branch also has 1MΩ impedance at the corner frequency, and low frequency is exactly where noise is worst.

The cascode is not only there for gain - clamping Vds for Q2 is meant to limit the amount of heat dissipated on the part.
Power dissipation could be reduced by simply lowering the mirror supply voltage, but input stage GBW will suffer with loss of cascoding. Maybe less critical than low frequency gain if high frequency noise of U1 is good.

Regarding the mirror, I have seen some references to using resistive loads in long tailed pairs for low noise (from memory in AoE chapter 3 and the 4625 data sheet).
If the input stage gain is high. For that, sufficient voltage needs to be dropped across those drain load resistors. Input stage gain is simply gm·Rl - more resistance is more gain, and more voltage across the loads. In bipolars it's particularly simple: gain is the voltage across Rl divided by thermal voltage (20~40mV over military range).

Active loading gives very high gain with low voltage loss.

In LTSpice, adding the mirror decreased the input referred noise, and it did not show a significant contribution from those transistors.  That said, I am more confident in the accuracy (and relevance) of my measurements than I am of the simulation results.
And rightly so, because LTspice doesn't simulate flicker noise in discretes.
It does in most opamp macromodels, even from other manufacturers.


For experiments, you could try to mod the circuit on the existing board. For example, Q3 could have their collectors and emitters shorted, rendering Q4 an ordinary mirror. No problem with it until emitter differential voltage reaches hundreds of mV and Q3A BE junction is activated. Q5 could probably be treated similarly.
« Last Edit: March 15, 2022, 06:05:26 pm by magic »
 

Offline Gerhard_dk4xp

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Re: JFET input stage low noise amplifier
« Reply #10 on: March 16, 2022, 02:16:09 am »
>And rightly so, because LTspice doesn't simulate flicker noise in discretes.
>It does in most opamp macromodels, even from other manufacturers.

In fact, it does simulate flicker noise in discretes. It's just that
most models do not provide the numbers.

Pic is Bob Widlar's trick to get less bias current from BJTs than
from FETs, at least at elevated temperatures.
This was the basis for one National LM1?? op amp.
Input transistors are super-beta and operate at Vce = 0.7V.
I don't claim to have understood it to the full extend.
 
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Offline Gerhard_dk4xp

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Re: JFET input stage low noise amplifier
« Reply #11 on: March 16, 2022, 02:36:51 am »
I have spent far too much money on IF3602, at €80+ a pop.
They are all individuals.
The new data sheet is closer to reality, but with these data it is
no longer interesting.
Yes, they offer a selection service. I guess, what we get at Mouser
is what is left over. :-(
The data sheet guarantees next to nothing. And this capacitance!
You are better served with On Semi 3910, 4 pcs. in par.
 

Offline magic

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Re: JFET input stage low noise amplifier
« Reply #12 on: March 16, 2022, 07:55:25 am »
Pic is Bob Widlar's trick to get less bias current from BJTs than
from FETs, at least at elevated temperatures.
This was the basis for one National LM1?? op amp.
Input transistors are super-beta and operate at Vce = 0.7V.
I don't claim to have understood it to the full extend.
It's LM108 and LM112 (internally compensated) and there is really no trick there. It has 1nA input bias which is fairly stable with temperature as in most bipolar opamps because β actually improves with temperature. Later iterations like LT1008/LT1012 or OP97 pushed it down to <0.1nA with active bias cancellation, but that does nothing against current noise and only increases it in most cases.

Such bias current simply happens to be less than the leakage of JFETs running at 100°C, because that's far from stable and increases exponentially with temperature. At low temperature you are better off with JFETs of course. With 20mA bias current you are better off with JFETs too ;)

Collector voltage plays no role other than power dissipation and the fact that those IC superbeta transistors from 1969 couldn't sustain more than a volt or a few. Yours is rated for 20V as I see.
« Last Edit: March 16, 2022, 10:52:53 am by magic »
 
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Online ch_scr

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Re: JFET input stage low noise amplifier
« Reply #13 on: March 16, 2022, 08:00:06 am »
I have spent far too much money on IF3602, at €80+ a pop.
They are all individuals.
The new data sheet is closer to reality, but with these data it is
no longer interesting.
Yes, they offer a selection service. I guess, what we get at Mouser
is what is left over. :-(
The data sheet guarantees next to nothing. And this capacitance!
You are better served with On Semi 3910, 4 pcs. in par.
I do not understand, why no one is intrested in Linear Systems FET offerings?
They are much more reasonably priced and have representatives in many countries through which one can order. The datasheets are also more constrained.
But if you need the absolutely lowest possible noise (at the price of gate capacitance and matching) you have no other option I guess  :-//
 

Offline MK

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Re: JFET input stage low noise amplifier
« Reply #14 on: March 16, 2022, 05:32:47 pm »
Hi,

Well the Linear systems are only now really becoming available, and the CHP3910 has a 30Hz or so 1/f corner and I can buy 10 for £3.10 from a distributor in the UK, I could buy 30 for less than the price of one 3601 and select the best few for a low noise amp and have some spares for other jobs.
 

Offline macaba

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Re: JFET input stage low noise amplifier
« Reply #15 on: March 16, 2022, 06:00:30 pm »
A bit of anecdata that may be useful to someone - I measured the automotive version of CPH3910 (NSVJ3910SB3) as having less noise than CPH3910. Different fab/tighter process perhaps?
 

Offline Gerhard_dk4xp

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Re: JFET input stage low noise amplifier
« Reply #16 on: March 16, 2022, 06:38:33 pm »
I got abt. 320 pV/rtHz from 16 CPH3910, unselected, right from the tape.
Simulation with ON semi spice parameters is 100 pV more optimistic.

An array of 16 can happily oscillate at 650 MHz. Beads help against that.
It was funny that each transistor had different RF voltages although they
were strictly in parallel, only separated by short traces, as seen on a 2.5GHz
scope with 0.6 pF active probe. OK, the 4*4 layout looked somewhat like
a Lange coupler.

Beads do not help against low-MHz oscillations.
The latest incarnation of this amplifier is only about half-way populated.
Still soldering to do.
I changed the cascode from folded to normal. I wanted to run it from
+- pairs of Li batteries but I have given in to use a higher positive voltage.
 
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Online Kleinstein

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Re: JFET input stage low noise amplifier
« Reply #17 on: March 16, 2022, 07:10:52 pm »
With some scattering in the threshold voltage the current would not share perfectly without extra resistors. This reduces the effectiveness of a parallel combination of multiple non matched JFETs.
 

Offline Gerhard_dk4xp

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Re: JFET input stage low noise amplifier
« Reply #18 on: March 16, 2022, 08:26:49 pm »
In #11 one can see that this is a problem with IF3602. At a given Vgs,
some samples may be WIDE open while others still are closed.
BF862 were and CPH3910 seem to be much better behaved in this respect.

An outlier does not poison the pot, but it does not add it's share to the total gm
while adding its capacitance.

The Widlar example was just to demonstrate 1/f in LTspice transistors.
I had the file on the pc.

Vce = Vbe = 0.7V does not create additional currents. The circuit does depend on it.
It is not just to prevent breakdown.
The 2SD2704 is not a typical superbeta transistor, but you can't buy much better ones.

https://www.digikey.de/de/products/detail/onsemi/CPH3910-TL-E/4847608?s=N4IgTCBcDaIMIAcAWBmAnARgAwgLoF8g  >

0 available. Chipageddon hits again.



« Last Edit: March 16, 2022, 08:44:29 pm by Gerhard_dk4xp »
 

Offline 3roomlab

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Re: JFET input stage low noise amplifier
« Reply #19 on: March 16, 2022, 09:38:47 pm »
maybe some of you have already seen this comparison

https://www.mvaudiolabs.com/diy/modern-jfet-noise-measurements/



there is also the guy from japan
http://tech-blog-en.sblo.jp/article/183391570.html

 
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Offline julian1

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Re: JFET input stage low noise amplifier
« Reply #20 on: March 16, 2022, 10:24:35 pm »
Do the signal relays and analog muxes have better bandwidth properties at 100kHz than using dpdt toggle switches directly? Or perhaps the design was influenced for possible future digital/mcu control?
 

Offline Gerhard_dk4xp

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Re: JFET input stage low noise amplifier
« Reply #21 on: March 17, 2022, 10:08:03 am »
Is this for Curtis or me?
I had ADG1404 CMOS switches in earlier versions, with a
Xilinx Coolrunner2 as a decoder + opto coupled SPI interface
for computer control. I think there was some crosstalk, even
leading to oscillations @80 dB+ gain.
The Coolrunner needed programming which is a NoNo for
most people even if I provide the JEDEC file. So I changed
everything to relays. Esp. at in the input section it is hard to tell
if the analog switches are still OK or good enough at all.

There is one relay that is controlled by a window comparator
that checks the operating point of the input stage. After
power-on or gross overdrive it reduces the gate bias resistor
by one or two decades; otherwise it takes a month to return
to the valid o/p. I seemed to have some problems with
switching kickback.
There are also relays on the input to short it or to apply 60R
as a 1 nV/rtHz standard noise.
I could not use mechanical switches since the amplifier and
its Li cells are inaccessible in a Hammond alu box. Avoiding
ground loops helps tremendously to get clean spectra.
« Last Edit: March 17, 2022, 10:10:12 am by Gerhard_dk4xp »
 

Online MegaVolt

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Re: JFET input stage low noise amplifier
« Reply #22 on: March 17, 2022, 10:14:48 am »
I got abt. 320 pV/rtHz from 16 CPH3910, unselected, right from the tape.

Can you share the circuit diagram?
 

Offline Gerhard_dk4xp

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Re: JFET input stage low noise amplifier
« Reply #23 on: March 17, 2022, 10:32:24 am »
Yes, I'll do when the semi-soldered version works.
There are too many versions otherwise I have to keep track of.
I don't want to usurp this thread.

One more thing with the IF3602:
Does anybody know how this plateau in the noise happens?
X-axis is in KHz.
« Last Edit: March 17, 2022, 10:38:49 am by Gerhard_dk4xp »
 
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Online Kleinstein

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Re: JFET input stage low noise amplifier
« Reply #24 on: March 17, 2022, 11:39:43 am »
From the little measurements I have done with JFETs I have seen quite some popcorn noise.  The popcorn noise with a limited number of steps / active defects should have some lower frequency limit to where most of that noise happens. In the noise spectrum popcorn noise may look a bit like the shown curve with a 1/f like fall of to lower frequencies and some maximum at around the typical frequency for the jumps.

With relatively fast processes the jumps may not be so obvious and identifiable as popcorn noise.
 


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