DIY high resolution multi-slope converter

[Rerouter]

+20V -19.2V could be done. Would need an extra supply for the 2 pass transistors in the reference, higher voltage zeners. And adjustment of the current source on the intefrator output. as everything else is still inside operating range. At minimum its not hard to tweak for the option. Just ugly fitting an extra supply on there that is unlikely to be used for most with a supply load of around 45mW

[branadic]

By the way... it could be worth using an isolated ultralow noise power supply such as a dc-dc converter based on LT1533, followed by low noise LDOs. I recommend the DC230A-C board with ±15V on the secondary side. Already have that demoboard on my desk and it works a treat by now. Still need to add the LDOs.

-branadic-

[Rerouter]

Isolating the +-15V rails do not buy much currently as the switch IC's need logic signals, and the ADC / Analog comparitor outputs make it uglier to float. you can by treating things as differential, but ugly...

But yes PSRR was something I was starting to consider earlier, the LM78XX tend to have less than 100uV of noise, so they are fairly quiet, but the DC shift of ~15mV via load and line are not so nice. in reality it should be smaller, but have to account for it.

[Rerouter]

Been going through things more, R31/32 seems off, they drop about 2.3V each during normal operation, the supply variation is only a few mV, and it would certainly prevent any signals getting out, but seems excessive. (Supply current will vary between ~ 13-15mA during operation on the analog rails)

C6 and the whole virtual ground, can I ask what your trying to control for? just not yet able to see the exact purpose

For power supply options if you want to keep looking into it branadic, its 40mA max on +--15V while operating + initial heater current.

[MiDi]

I recommend the DC230A-C board with ±15V on the secondary side. Already have that demoboard on my desk and it works a treat by now. Still need to add the LDOs.

125$ 
Similar PS: Silentswitcher from Linear Audio NL ~80Eur

[Rerouter]

I feel he meant for a reference schematic and BOM, those evaluation boards are always overpriced.

[Kleinstein]

For a ration measurement there are 2 ways: the true ratio with an external reference to the ADC and to have the ADC to measure the two external voltages in a fast sequence. The second method is definitely easier to implement, especially if an OP like LTC2057 is considered acceptable (input bias in the 100 pA range) as input buffer. With the filtering at the reference one has very little noise in the 10 Hz range. If needed slightly more filtering should be possible - enough to bridge the time for 4 short conversions.

A true external reference would need a differential input, either for the reference or the input. A differential input for the signal should be easier to implement, as the ADC is naturally kind of pseudo differential with 2 conversions and taking the difference. With gain things get a little more complicated, but differential gain would be still possible. For the reference the current combined x 2 and -1.9 scaling could still work, but with a reference voltage much different the the comparator limit may also have to change or more reserve left at the µC intgenal ADC. In this case I would prefer a slightly different, more conventional setting: the first stage as x1.5 or x2  and maybe x 4/3 to chose from and than a separate fixed times -0.96 or so for the negative side.

I think the simpler way with 4 ADC conversions and maybe slightly more reference filtering would be sufficient.

I know that R31/R32 values are relatively high. The Idea behind this is to have the AC current from the reference modulation to flow through C6 and not much through R31/R32. Things are less critical if the ground buffer U1 is used - in this case lower resistors are more suitable.  I don't see 13-15 mA for the supply island. Its mainly an OPA172 (~2 mA) and NE5534 (~ 5 mA but variable) and maybe some 1 mA through R12 between the 2 OPs. So more like 1 V drop at each side.

For the supply, I have tied a simple DC/DC converter (push pull drivers with dead time and generous snubber) with no obvious extra noise. I don't think the actual driving circuit would be the critical part. The tricky part can be more like the transformer itself to get a low common mode signal / capacitive coupling. AFAIK this would get better with a relatively large core and some space between the core and windings.

[jbb]

Yes, an isolated supply would require some care. I guess the following would be relevant:

• Reduce capacitive coupling by using a large toroid core and a snap on plastic cover to make an air gap between primary and secondary
• Consider electrostatic shielding between primary and secondary windings (some designs have been spotted using coax cable for this)
• Reduce dV/dt with slew rate limited transformer driver and snubbers (on both primary and secondary) or maybe use a resonant converter
• Reduce stray magnetic field by using toroid core and careful winding terminations (no partial turns!)
• Reduce stray magnetic fields by careful layout of rectifiers and filter capacitors
• Investigate system sensitivity to various frequency ranges (eg frequency mixing in multiplex schemes, autozero / chopper amplifiers and ADC sample rates. Synchronisation of DCDC converter and ADC clock may be required

Edit: as you can see, that’s quite a few things to consider. PPM level equipment is hard.

[SilverSolder]

Yes, an isolated supply would require some care. I guess the following would be relevant:

• Reduce capacitive coupling by using a large toroid core and a snap on plastic cover to make an air gap between primary and secondary
• Consider electrostatic shielding between primary and secondary windings (some designs have been spotted using coax cable for this)
• Reduce dV/dt with slew rate limited transformer driver and snubbers (on both primary and secondary) or maybe use a resonant converter
• Reduce stray magnetic field by using toroid core and careful winding terminations (no partial turns!)
• Reduce stray magnetic fields by careful layout of rectifiers and filter capacitors
• Investigate system sensitivity to various frequency ranges (eg frequency mixing in multiplex schemes, autozero / chopper amplifiers and ADC sample rates. Synchronisation of DCDC converter and ADC clock may be required

Edit: as you can see, that’s quite a few things to consider. PPM level equipment is hard.

Worth going for battery power instead?

[Kleinstein]

Battery power is still possible. However it takes some time for warm up. So if would be more like to have battery power as an option, but still also have the option for mains power. Even with battery power one would likely need some switched mode converter, as there are several supply rails (+-15 V and +5 V). A input stage may also want some -20 V or so if JFET switches are used.
A good isolated power supply needs some care, but is not impossible.

The current circuit is not optimized for low power, but the power is still not too high (e.g. should be a little under 1 W). There are a few point where one may reduce the power: change from the NE5534 to a lower power OP (e.g. OPA197), reduce the voltage for the µC to some 3.x V. This also allows a lower power oscillator. If needed the clock cold be reduced to some 8 MHz with not too much penalty. For the input buffer one could consider a single OPA189 instead of the 3 OP version. Instead of the OP07 there are also lower power versions, even with slightly lower noise (e.g. OPA207).

[Rerouter]

Just to poke it along, Getting closer to what I am happy with, Reference ends up in a bit of a weird place, but its the best I have for now,

Will probably end up shifting the micro up a little, to fit the serial comms under it,

And the reference a little down and to the left, this will give me a bit more room for the input area, and fitting the latest ideas for an inverted amplifier for the input voltage,

Power traces added for now, it wraps around a fair bit, but the local decoupling, and overkill trace width should remove much concern for voltage drooping.

Edit: I should confirm if that is the desired clock source footprint? only been working with small SMD stuff in the past. so seems a bit big.

[Echo88]

@jbb: Could you elaborate on the "careful winding terminations (no partial turns!)"-statement and maybe link those found coaxcable-transformer-designs? Im playing around with low noise DCDCs myself at the moment and always look for fresh papers on this topic.

[MiDi]

Coax-Transformer in K7510 @50mins:
https://youtu.be/uvgJ2zAxgAY

[Cyan]

US-Patent US9478351 seems to be a good read on this topology.

[fcb]

US-Patent US9478351 seems to be a good read on this topology.

Its a nice way of doing low-noise, low L/C txfmr.  A little surprised they got a patent, pretty sure i've seen similar txfmr concepts as gate drive transformers though.

[Rerouter]

Another day, another few more steps into madness,

J4 is the 10 pin ICSP header, as 3 pins are shared in common, going to try and make a combined 10 pin + 6 pin footprint for both programmer styles, painful, but not a bad option

Bunch of components top left are from the window comparator, need to work it back in with the larger inverter stage.

Still working out where is best to have the UART, but its practically all laid out at this point

J400 / J401 still working out how best to add, as at present we don't exactly have a +10V rail for the heater, would this just be another +15V? also some level of measurements between the points would allow for plug and play

Open to any suggestions, even added in the reference slots, tell me what it is, and It will be added.

(Will try and add some slots to the top right of the reference once the input amp is a bit more together.)

Edit: Helps if I attach the correct image....

[Kleinstein]

The power inputs could probably be placed a little more together, so one could use one connector for the power input.

Similar the output of the inverter for use as 20 V input could be closer to the corresponding input.

I have the 10 Pin ISP connector in a way with 2 extra signals (normally ground) so that the connector could also be used to control an external front end. The extra pins are used as CS for SPI and maybe  in a far future as clock for an chopper amplifier.

The guard traces around some digital signals look odd.  With the clock signal it is usually more about loop area than capacitive coupling or surface leakage.

The LTZ1000 reference (e.g. A9 board)  does not need exactly 10 V for the heater this could be also 15 V or maybe the 15 V with an external resistor / zener in series. The original A6 board used connector that go through the reference board, so that reference board would be very close the to board and would thus need quite some free space. So it could be tricky to really allow that board.  The connector can still be OK.  Also remember that the LTZ1000 voltage is a little high one could need a JFET instead of the NPN + zener to drive the positive reference.

[Rerouter]

Added the other programming header, and fixed the power connections into a single plug, Free to be used how anyone prefers, for now means both styles of programmers will also be supported.

Fixing up the input amplifier will take a bit more time, as I was not sure what the inverted output was being used for.

Clock guard was mostly to keep it from injecting signal into anything else. I am still working on overkill,

The guard around U202's traces was for the same reason, due to time constraints any updates to him would probably be at a high speed, and as he is near the input array, wanted to soak up some of the noise.

Edit: the plan is currently to shift up the micro 3-4mm higher to fit the UART connector right next to the power connector, just a little painful to get it to fit nicely.

[Kleinstein]

Shifting the µC up and fit the UART isolation just below is probably the area to use - no ideal, but not so bad. For a first test there is no real need to have the distances for high voltage isolation. The opto couplers also don't look like made for high voltage, more like the normal to slightly lower isolation level, but that is OK.

The inverter output is meant to be used as the negative side terminal for a +-20 V range input together with U16. So these pins should ideally be no separates so much. The would likely be wires to the connectors - so it is not important, just nice to have.

[SilverSolder]

Another day, another few more steps into madness [...]

This is beginning to look cool!   

[MiDi]

What is the reason to stick with the quite bulky tht uC and osc - everything else is smd?
At a first look, the massive snake bus bottom right catches the eye. I did not dive in detail into the layout, but looks like it could be shortened.
The project seems to get close to the finish - keep going 

[Rerouter]

Canned oscillator as clock jitter was effecting the accuracy, but can be swapped out, been building that area to make it fairly painless to alter to a well built crystal.

Micro can be SMD, have the footprint for the TQFP footprint off screen on the top left, but wanted to keep it as close to the original schematic as possible to start with. Also have an EEZ BBM3 template off to the left, but all things in good time.

Giant snake traces is to keep both heat away from the reference area, which does not nicely fit next to the crystal as it would leave it too near the power supply area. and keep digital from crossing the analog stuff, the input mux is switched between conversions so no noise on these traces should couple.

Needing to fit the input amplifier i the middle right part due to me using these constraints is another part for the snaking.

Playing with replacing the UART opto's with a digital isolator, ends up with roughly the same power dissipation, but should allow much faster transmission rates, so hopefully free up a few cycles for potentially setting the DAC or other stuff. at present I cannot keep it isolated and fit in where I was hoping, will keep playing to see if I can fit it, but for now surrendered and stuck it in my second choice.

Unless anyone can suggest much more, all that is left right now is that input amplifier. and the possible placement of J400/401, but for now there should be enough test pads in the area for someone to bodge in there higher end reference.

For the LTZ1000 reference, its output is ~7.1 compared to ~7.0, even doubled this is still within the control range of Q7, which should be good up until ~14.5V, is there any reason why we would need the Jfet in this case.?

Also as a secondary point, everything on the board so far can run at +-18V, so there is headroom if it is really needed.

For the option of an external 10V reference, thinking I will just break out test points for the supplies to Q7/Q3 in the reference, so if anyone wants to, they can drive them with a higher bodged on voltage otherwise just fitted with a jumper.

And double checking pays, LTC2057 is mainly available in an MSOP package, so that should make it easier to pack together the input amplifier.

[Rerouter]

Ok. looks like its done, any suggestions or additions?

Kicad files with gerbers attached,

Done with kicad nightly build kicad-r15194 if it does not open for what ever reason on current main versions.

[Rerouter]

Ok, slight edits coming, a BC850 is an NPN for instance, fixing up now,

[MiDi]

Very nice, do you plan to put the project on github/gitlab?
Is there a reason not to have groundplanes/groundfilling at least for some areas?