The ad847 (15nV/√Hz, 50MHz) is old school and copied from the k2002. I initially had a lt1358 (25MHz, 8nV/√Hz ) and 10k/10k. as the only other fast op in my possession.
I am uncertain about the need for much slope gain, since the lt1016 already boasts GBW ~= 50GHz according to the datasheet. Maybe the next test will be ne5532 (5nV / 10MHz) and 5k/5k. Power and heating is low because of the limited voltage range +-0.7V, but with 1k/5k I did forget about the possibility of loading on the integrator.
With some term adjustment and a 2 variable regression model, and calibrating against the local ref at 7.1V, I now get measurements in the voltage domain!..
clk_count_int_n 20000000
period 1.000000s
nplc 50.00
clk_count_init_n 10000
clk_count_fix_n 700
clk_count_var_n 5500
mod freq 909Hz
use_slow_rundown 1
himux_sel 1101 ref-hi
sampling ref-hi
count_up/down 2163 1061, fix_up/down 1612 1612, clk_count_rundown 26348, predict 7.099,998,9 stddev(5) 0.36uV,
count_up/down 2163 1061, fix_up/down 1612 1612, clk_count_rundown 26345, predict 7.099,999,3 stddev(5) 0.30uV,
count_up/down 2163 1061, fix_up/down 1612 1612, clk_count_rundown 26342, predict 7.099,999,6 stddev(5) 0.30uV,
count_up/down 2163 1061, fix_up/down 1612 1612, clk_count_rundown 26341, predict 7.099,999,7 stddev(5) 0.36uV,
count_up/down 2163 1061, fix_up/down 1612 1612, clk_count_rundown 26337, predict 7.100,000,2 stddev(5) 0.49uV,
count_up/down 2163 1061, fix_up/down 1612 1612, clk_count_rundown 26336, predict 7.100,000,3 stddev(5) 0.43uV,
count_up/down 2163 1061, fix_up/down 1612 1612, clk_count_rundown 26336, predict 7.100,000,3 stddev(5) 0.38uV,
count_up/down 2163 1061, fix_up/down 1612 1612, clk_count_rundown 26335, predict 7.100,000,4 stddev(5) 0.19uV,
count_up/down 2163 1061, fix_up/down 1612 1612, clk_count_rundown 26343, predict 7.099,999,5 stddev(5) 0.38uV,
count_up/down 2163 1061, fix_up/down 1612 1612, clk_count_rundown 26335, predict 7.100,000,4 stddev(5) 0.38uV,
count_up/down 2163 1061, fix_up/down 1612 1612, clk_count_rundown 26340, predict 7.099,999,8 stddev(5) 0.38uV,
count_up/down 2163 1061, fix_up/down 1612 1612, clk_count_rundown 26341, predict 7.099,999,7 stddev(5) 0.36uV,
count_up/down 2163 1061, fix_up/down 1612 1612, clk_count_rundown 26339, predict 7.100,000,0 stddev(5) 0.30uV,
sampling ref-lo
count_up/down 1696 1540, fix_up/down 1618 1618, clk_count_rundown 59344, predict -0.000,001,1 stddev(5) 0.46uV,
count_up/down 1696 1540, fix_up/down 1618 1618, clk_count_rundown 59347, predict -0.000,001,5 stddev(5) 0.43uV,
count_up/down 1696 1540, fix_up/down 1618 1618, clk_count_rundown 59344, predict -0.000,001,1 stddev(5) 0.24uV,
count_up/down 1696 1540, fix_up/down 1618 1618, clk_count_rundown 59338, predict -0.000,000,4 stddev(5) 0.43uV,
count_up/down 1696 1540, fix_up/down 1618 1618, clk_count_rundown 59348, predict -0.000,001,6 stddev(5) 0.40uV,
count_up/down 1696 1540, fix_up/down 1618 1618, clk_count_rundown 59344, predict -0.000,001,1 stddev(5) 0.40uV,
count_up/down 1696 1540, fix_up/down 1618 1618, clk_count_rundown 59339, predict -0.000,000,6 stddev(5) 0.42uV,
count_up/down 1696 1540, fix_up/down 1618 1618, clk_count_rundown 59345, predict -0.000,001,3 stddev(5) 0.44uV,
count_up/down 1696 1540, fix_up/down 1618 1618, clk_count_rundown 59338, predict -0.000,000,4 stddev(5) 0.44uV,
count_up/down 1696 1540, fix_up/down 1618 1618, clk_count_rundown 59342, predict -0.000,000,9 stddev(5) 0.32uV,
I want a good record for baseline performance before playing with other circuit changes (speed, samples, slope amp etc).
INL looks tricky. My sig-gen wanders at the 4th and 5th digits for DC. And my 6.5meter doesn't show final digit uV on a +-10V range.
I experimented with perturbing the modulation frequency slightly, while holding the same cal coefficients. And I get around +-5uV delta sampling ref-in.
Other eevblog threads suggest a good proxy test is to sweep voltage - and plot different modulation parameters/ and swap input polarity (turnover test)
The options I am considering to generate these input voltages are,
Another ltz1000 ref (1.2uV p2p 0.1-10Hz) + bipolar dac (1uV RMS 0.1-10Hz) .
Alternatively a largish (buffered) capacitor and switching to be able to be able to charge/discharge it.
Both possibilities need another custom pcb, which will be slow with the new year.
The problem with the sweep techniques is that they won't reveal the true shape of non-linearity (which might also be corrected with non-linear terms) .