AC Voltage Standard

[PTR_1275]

I know you're talking about making one, I recently purchased a EDC AC source. I can't find much information on them, but happy to take photos of the internals when I get it and see what makes it tick. 6 decades of switched, 10mv, 100mv, 1v and 1000v at 50, 60, 400, 1000 or 5000hz. I can't wait to get it on the bench and run some performance tests on it

[amspire]

I will be interested to see the EDC AC source. I would love to have full accuracy at 1000V AC, but making an amplifier like that is definitely really hard. My first goal would be to get a very accurate AC output up to about 1.5V RMS. I will worry about the voltage boosting later.

[Kleinstein]

When using PWM as an accurate DAC, there are uncertainties in switching times  and charge injection effects. Thus for a really accurate value the frequency should not be that high. To avoid too much residual ripple, one essentially needs an higher order filter. The simple RC filter is not that practical.

Even if it is only the difference in switch resistance that enters, this can be a problem for really accurate outputs. Large area and thus low resistance FETs add more charge injection and capacitance and are this only a limited option. In addition the FETs resistance is highly temperature dependent (e.g. 6000 ppm/K). For 0,01% this might still be OK, but it gets increasingly more difficult. Some of the errors in an PWM based DAC are just offset type and might thus be less of a problem with an AC signal. However the speed is very limited.

[amspire]

When using PWM as an accurate DAC, there are uncertainties in switching times  and charge injection effects.

Uncertaincies?  It is easy having jitter effects much less then 0.1ppm, and rise and fall times of the switch can easily be measured and characterised. A 3 or 4 stage RC filter can easily reduce the noise to less then 1ppm for a 10Khz PWM frequency with a 1 second settling time.

With a 1ns timing resolution and a 10KHz PWM clock, it is not hard with edge errors to still achieve 10ppm with a simple cmos logic IC as the switch. The 74VCT family can get down to the sub 2ns switching speeds. I will probably end up with 0.66ns timing resolution (that is what I can get from 1 PLL on the Cyclone II board I will use)  and it is also not hard to compensate for unequal edges.

 Thus for a really accurate value the frequency should not be that high. To avoid too much residual ripple, one essentially needs an higher order filter. The simple RC filter is not that practical.

Even if it is only the difference in switch resistance that enters, this can be a problem for really accurate outputs. Large area and thus low resistance FETs add more charge injection and capacitance and are this only a limited option. In addition the FETs resistance is highly temperature dependent (e.g. 6000 ppm/K). For 0,01% this might still be OK, but it gets increasingly more difficult. Some of the errors in an PWM based DAC are just offset type and might thus be less of a problem with an AC signal. However the speed is very limited.

Don't use large area low resitance FETS. You need them for DACs, but not for PWMs. If you use 100K resistors for the PWM and the cmos switch resistance is 10 ohms, you already have an worst case error of 100ppm. It does not matter what the cmos resistance is - only the difference between the high and low channels matter. If you can find a device where the resistances match within 10%, you have 10ppm error. So you are only looking at tweaking the design to get the extra factor of 10 improvement for 1ppm.

100K sounds high, but with opamps available now with a 1pA input current maximum at 25 degC, using resistances of 100K from the switch output to the first capacitor is practical. You can use guarding to handle leakage currents. You also have to test the capacitors for leakage.

As always, to get 1ppm, you have to work through everything in detail, but as I said, 100ppm is dead easy to achieve.

If you want a reference, DACs and A/D IC's can be more difficult. It wouldn't be a very clever metrological strategy to just chuck a device in a reference circuit and just assume it will meet the manufacturers specs. How are you going to verify the accuracies of these devices?

Precision PWM sounds hard until you actually try it.

[Kleinstein]

With a high frequency PWM, on relies on fast and accurate transitions. However the turn on / turn off times are not that stable and are not necessarily the same.
The bigger problem is loading the reference input: fast switching causes ringing on the supply and the reference voltage - if you need to rely on ns speed switching this needs a layout good for GHz frequencies - not that easy with the layout, and may not be stable with changes in humidity or similar. In this high frequency range a lot of strange, little predictable effects might happen.

There is a good reason the 5700A used a rather low PWM frequency. Typical logic outputs are more like 50-100 Ohms switch resistance, 10 Ohms FETs are usually already slower and create significant more switching spikes on the supply. A 100 K resistance in the filter sound reasonable. However this would be just a 1st order filter and there is no way of easy cascading to higher order. Even with buffers in between a chain of 1st order filters don't make a good higher order filter. So the filter circuit in the 5700A has it's reason. Today one might get away with monolithic OPs instead of the discrete JFET pairs. So it can get a little easier there.

PWM, if used in the right way might offer a high degree of linearity, but the filter will cause some frequency dependence. So it might be OK for DC and very low frequencies (e.g. < 1 Hz), but nothing really useful in the AC range. Even a filter at 1 KHz will have quite some residual effect in the 50 Hz region. Some of it is predictable, but it depends on the capacitors (not just capacitance but also loss).

With ready made ADCs, it is possible to measure the dynamic effects as well. A simple step signal or low frequency square wave usually provides enough information. With modern, fast chips that work up to the MHz range, there is no much dynamics going on with 100 Hz sine signal. It is essentially DC in this range. Linearity of the ADC in the AC range is usually well characterized by THD and can be measured if needed.

[pelule]

For those who interested, here the data sheet of the SWR300 and a AppNote.
I worked with in the past.
Thaler was aquired by Cirrus Logic in December 2008. The products are sold as Apex Precision Power:
   http://www.cirrus.com/en/products/apex/thaler.html
The SRW300 is obsolet, but the SRW200 is still available:
  https://www.apexanalog.com/products/vre_selector.htmll
  https://www.apexanalog.com/products/swr200.html
/PeLuLe

[chris_11]

PWM modulators show clock feed through and unsymmetrical transitions. The same problems you have in any internal sigma delta modulator of AD and D/A. There is a reason that it is extremely difficult to get them to ppm range or sub ppm range linearity. Resolution is not the problem, you can get 32 bits out where the most part is noise, but the linearity is the problem.

[amspire]

With a high frequency PWM, on relies on fast and accurate transitions. However the turn on / turn off times are not that stable and are not necessarily the same.
The bigger problem is loading the reference input: fast switching causes ringing on the supply and the reference voltage - if you need to rely on ns speed switching this needs a layout good for GHz frequencies - not that easy with the layout, and may not be stable with changes in humidity or similar. In this high frequency range a lot of strange, little predictable effects might happen.

A device like the 74LVC1GU04 has a typical transition of 1.3ns - maximum of 3ns. The resistance is about 20 ohms. I can work with that. I can easily slow down the PWM frequency if I have to for both AC and DC.

There might be ringing. Looking at the effect of this is part of the fun of design.

There is a good reason the 5700A used a rather low PWM frequency. Typical logic outputs are more like 50-100 Ohms switch resistance, 10 Ohms FETs are usually already slower and create significant more switching spikes on the supply.

I gather the 5700A uses 200Hz using technology from many decades ago. You can have the same issues with 200Hz switching when you have older technology components.

For DC, there are methods to test for issues like uneven transition time. If you set the output voltage for 5mV, then every 1ns difference in transition will cause a 1% error in this voltage. Once you know the error, it can be easily compensated for both in the case of AC and DC waveforms. If I was chasing the best accuracy, I could have a test done on this at startup. The only number I need is the difference.

A 100 K resistance in the filter sound reasonable. However this would be just a 1st order filter and there is no way of easy cascading to higher order.

A very odd comment. Each RC stage reduces the ripply by over 1000. I can have as many RC stages as I like, but 3 would be more than enough, even with a much lower PWM rate (if I choose to do that).

Even with buffers in between a chain of 1st order filters don't make a good higher order filter. So the filter circuit in the 5700A has it's reason. Today one might get away with monolithic OPs instead of the discrete JFET pairs. So it can get a little easier there.

the 5700A is filtering 200Hz and trying to get a quick settling time. That needs a much better filter.

PWM, if used in the right way might offer a high degree of linearity, but the filter will cause some frequency dependence. So it might be OK for DC and very low frequencies (e.g. < 1 Hz), but nothing really useful in the AC range. Even a filter at 1 KHz will have quite some residual effect in the 50 Hz region. Some of it is predictable, but it depends on the capacitors (not just capacitance but also loss).

With ready made ADCs, it is possible to measure the dynamic effects as well. A simple step signal or low frequency square wave usually provides enough information. With modern, fast chips that work up to the MHz range, there is no much dynamics going on with 100 Hz sine signal. It is essentially DC in this range. Linearity of the ADC in the AC range is usually well characterized by THD and can be measured if needed.

You have to have the R/C combination initially for the AC PWM, but then it has to be followed by a real filter - either a 3rd order filter such as a Butterworth, or a 2nd (perhaps 1st) order eliptical filter. The beauty of the Elliptical filter is you can have a notch at the frequency of the greatest harmonics. The filter a can be active or passive.

When you pick the right type of filter, the gain of an active filter at 1/50th of the lowpass corner frequency can be known with the same accuracy as the gain error of the amplifier just as an ordinary unity gain buffer. All AC amplifiers (whether for PWMs or DAC buffering) will not have perfect unity gains and this is all part of the design process. There are ways to handle this, but I now have the option of some opamps with very high bandwidth and so the gain error can be pretty low. I have a lot more choices then the 5700A designers had.

And I am talking about better then 0.01% accuracy. Probably a 0.01% reference would be a satisfactory result if that was the best I could achieve. A calibrated 5700A on its best range only manages 0.006% on its best range at 1kHz. If I can manage 0.01% before AC calibration (in other words, 0.01% accuracy in comparison to the DC reference), that would be a fabulous result. I have a Fluke AC/DC thermal transfer to check.

[amspire]

PWM modulators show clock feed through and unsymmetrical transitions. The same problems you have in any internal sigma delta modulator of AD and D/A. There is a reason that it is extremely difficult to get them to ppm range or sub ppm range linearity. Resolution is not the problem, you can get 32 bits out where the most part is noise, but the linearity is the problem.

My PWM clock will be 1GHz or better. When I said the pulse rate was at 40KHz for the PWM, there is no lower frequency clock that the pulse edges align to. As I said in another post, it is not that hard - if I need to - to measure the transition error (probably 2ns maximum for the kind of chip I will use) and compensate. The final error is calculable and is pretty satisfactory. If I need it, I can basically reduce the transition errors to 0.66ns.

The reason why I went to do this on a FPGA is initially tried to do a lower quality version on an Atmel  microprocessor's PWM and it gets very ugly. The FPGA just makes it easy to get a PWM that works the way I need.

I have tested the PWM with a 250MHz clock, but I want to boost it to an effective 1.5GHz clock.

A PWM with harmonic cancellation is nothing like sigma delta or any other PWM that has no harmonic cancellation. There genuinely is negligible harmonics in the PWM waveform up to over the 50th harmonic. Without the cancellation, PWM for AC is not at all good. I can match the 5700A distortion figures without huge difficulty.

I may only have spot frequencies. I can have fully programmable frequencies but I cannot get best performance for all the frequencies, and I will probably need at least 3 different filters to get down to frequencies as low as 10Hz.

[Kleinstein]

Using PWM as an DAC and using a "PWM" pattern with harmonic cancellation are different techniques. With the harmonic cancellation  there would be an increasing amount of higher frequency content. The high frequency part above something like 10 MHz usually does not behave like DC anymore - so damping of a low pass filter will go down again at some point. If not absolutely needed one should avoid such RF magic with impedance matched lines and caring about capacitors ESL - this can be a problem for larger film caps. Things may not be so bad if switching events are far enough apart to that ringing has subsided before the next transition. But it gets nasty if the next transition happens when there is still some ringing : it is no more linear from that point.
In real life I very much doubt the harmonic canceling will work well to very high harmonics. So maybe up to the 10 th harmonics.

Usually the gain of active filters is much less predictable than that of a simple buffer, it is only the DC gain that is OK. One problem is that capacitors are nor that ideal and there are also parasitic capacitors, that can even be nonlinear like the input capacitance of some OPs. Even with a theoretic suppression to the 50th harmonics, the filter would be still only a little higher than the frequency used. With a variable frequency this gets a really hard as it would need a tunable filter.

[amspire]

Using PWM as an DAC and using a "PWM" pattern with harmonic cancellation are different techniques. With the harmonic cancellation  there would be an increasing amount of higher frequency content. The high frequency part above something like 10 MHz usually does not behave like DC anymore - so damping of a low pass filter will go down again at some point. If not absolutely needed one should avoid such RF magic with impedance matched lines and caring about capacitors ESL - this can be a problem for larger film caps. Things may not be so bad if switching events are far enough apart to that ringing has subsided before the next transition. But it gets nasty if the next transition happens when there is still some ringing : it is no more linear from that point.
In real life I very much doubt the harmonic canceling will work well to very high harmonics. So maybe up to the 10 th harmonics.

it works beautifully. I have attached the numbers for a non-optimised 13 pulse/quadrant 1KHz PWM sinewave. These harmonics are the actual numbers with the clock I will use. This includes the inaccuracies in the edges to ideal.

With everything above the 53rd harmonic removed, the distortion is 0.0032%. That would be 10 times lower then the 5700A. That 0.0032% is absolutely real figure - that is what can be done with my PWM running at an effective 1.5GHz rate and with the fairly straightforward switch edge transition error correction. There are some other issues with the sinewave generation and I have tested some workable solutions, but I hope you are not asking to try and do the full design right here in this thread.

There are always nasty harmonics at the first non cancelled harmonics which is why I suggested an elliptical filer with a notch at those frequencies. Up around the 105th harmonic, it gets nasty again - that is 105KHz. It also has a much lower peak around 155KHz.

But so what? It is not as if there is a problem with RF filters. The whole thing can sit in a RF shielded box with RF filters/ferrites on the outputs if necessary

Usually the gain of active filters is much less predictable than that of a simple buffer, it is only the DC gain that is OK. One problem is that capacitors are nor that ideal and there are also parasitic capacitors, that can even be nonlinear like the input capacitance of some OPs. Even with a theoretic suppression to the 50th harmonics, the filter would be still only a little higher than the frequency used. With a variable frequency this gets a really hard as it would need a tunable filter.

Variable frequency is possible, but as I said with less than optimal figures. The easiest will be to go for some spot frequencies instead of fully variable. But I will try variable anyway, just for fun.

Now if you go back to my original post on this, I never said this was a preferred method over DACs. I said this is the way I was trying - it was the project I picked to learn programming FPGAs, and I pointed out some advantages it does have. The big one was with this approaches the sources of error can be accessed easily. DAC's and A/Ds do a great job, but you do put a lot of trust into AD, LT, etc. You cannot see what is happing inside these ICs. Even if a DAC can be tested and it is found it is perfectly accurate at DC, it is not a guaranty it will be as accurate at the sinewave digitizing frequency. They can have their own quirky problems and filter issues too.

I can easily do a 1ppm DC PWM with a great perfect monotonic linearity and stability (compared to the reference) - it is a 20bit DAC and previously I have used some tricks to go to 24 bits. This does work as I have tested it. Costs me under $20 for the parts in Australian dollars excluding the DC reference. Similar parts - costing perhaps another $15 - can exceed the 5700A's sinewave's performance for distortion and accuracy - that is if I push for a really high accuracy.

That is alright. It is worth a go, I think.

[2N3055]

Are these Don Lancaster style Magic Sinewave PWM sequences.. ?
I was thinking to experiment with  it..
What is your experience with it? Does it really work that well?

Regards,

[chris_11]

If you are in PWM generation get an actual class D audio amplifier. They are relative low harmonic and have solved those problems already. With a precise stabilised supply rail the AC voltage accuracy should be decent.

[branadic]

Thermal converter LT1088 is currently available by a german seller on ebay:

http://www.ebay.de/itm/TRMS-Wandler-DC-100-MHz-LT1088-/132160053754?hash=item1ec55a61fa:g:sQYAAOSwMVdYEP-6

But it is only 1% accurate from DC-50MHz and 2% to 100MHz. I was always wondering how a 50 ohms rf resistor and a platinum element would behave?

-branadic-

[amspire]

Are these Don Lancaster style Magic Sinewave PWM sequences.. ?
I was thinking to experiment with  it..
What is your experience with it? Does it really work that well?

Regards,

Only on breadboard up to now. The problem is it makes one quadrant. Just reversing the pattern makes the second. The third and fourth are the more difficult. The solution I tried that works well is to have two outputs with two resistors to a single cap. Use 0.01% matched resistors plus a trimpot to trim. For the first two quadrants, the second output is high. For the third and fourth,, the first output just inverts the pattern and the second output goes low. It works well.

Trimming for resistor matching is very easy. Just  output an antiphase. 1kHz square wave from the ports and with an amplifier on the capacitor, adjust for zero AC output.

Nicer to have a full wave solution, but I don't.

[amspire]

But it is only 1% accurate from DC-50MHz and 2% to 100MHz. I was always wondering how a 50 ohms rf resistor and a platinum element would behave?

-branadic-

I did a post on this using a small smd resistor and a small smd transistor glued together with Kapton layer as insulation. I used a diode junction as the temperature sensor. A miniature smd thermistor would have been preferable. I had to put it in a glass jar to remove air currents, but it did match the Fluke AC DC transfer standard to 0 01%. It is much slower then Fluke's sensor. It looked like it would work measuring the relative rate of change, rather then getting perfect static thermal matches.
https://www.eevblog.com/forum/metrology/diy-precision-ac-rms-to-dc-transfer-standard/

Richard.

[branadic]

I know it's quite an old thread, anyhow it fit's the topic.
Did anyone ever tried to build an AC voltage standard himself?
DC voltage references based on LTZ or LTFLU and the like have been demonstrated here over the last years. We also know there are Fluke 510A out there, with the related datasheets here and here, but also Fluke 5700 series calibators, quite expensive though.

On the other hand audio hobbyist have demonstrated ultra low distortion oscillators e.g. designs based on AN67 or such as Victor's Ultra low distortion (<0.00001%) 1kHz sine generator also described in more detail in An ultra low distortion oscillator with THD below -140 dB or Low distortion oscillator tests measurement circuits.

So it comes to mind to combine such an oscillator with a voltage reference such as LTZ for amplitude regulation (AGC), thus similar to what is done in Fluke 510A.
Is there any experience on that topic available here?

-branadic-

[1audio]

Interesting- I have both Victor's oscillators and a 510. (And an Optimation AC calibrator). I'll try to set up the Victor oscillator to see how stable they are. They use TL431's for a reference and a less sophisticated AC sense for regulation. The distortion is extremely low. Not so sure on the level stability. 

I think it may be possible to use a current generation DAC chip with a good reference but it might need temperature stabilization to get decent output stability. I now have two calibrated Fluke 931A's so I can see what stability is possible with some generic DAC's. I would hope its similar than the extensive complications in the all analog approach in the Optimation. Maybe use a dac + multiplying dac + stored correction table would address the stability/accuracy issues.

[branadic]

Fluke 510A uses LTFLU set to 14.14214 V for a 10 Vrms signal, so replacing the amplitude regulation of the formentioned Wien bridge oscillator and it's pot by a proper DC voltage reference could do the trick?



-branadic-

[TimFox]

I looked at the Apex datasheet for the SWR200DS precision sine generator.  Two external capacitors set the frequency, the harmonic distortion of the sine wave is very low, and a precision chopper measures what I interpret as the average absolute value of the sine wave to compare against a Zener DC reference to drive the AGC circuit in the oscillator.  Since the harmonic distortion is low (typ 0.1% above 2 kHz without loading, the spec sheet does not specify this very well), the ratio between the mean absolute value ("average responding" on your old -hp- voltmeters) and the root-mean-square voltage is well-defined.  Initial accuracy is specified as 0.5%, but the output is more stable than that.  The manufacturer claims that the chopper circuit tends to compensate for the temperature variation of the reference zener.
I didn't bother to look up the price.
One could try using a carefully-designed "precision absolute value" circuit, offset-adjusted and calibrated against a reversible DC source for use at mid-audio frequencies to drive the AGC in a low-distortion analog oscillator.

[1audio]

The apex looks quite interesting however the datasheet circuit doesn't make sense on the chopper/dc reference connections. I think additional filtering on the low pass filter on the output of the chopper will lower the distortion. Any idea how much for the part?

I don't have the circuit for Victor's oscillator handy but I'll check it soon to see how its reference is done.

[Kleinstein]

The Wien bridge (or similar) oscillator and then amplitude feedback is a common technique. For the amplitude there are a few methods to choose. Sync rectifier, precision full / half wave rectifier, peak detection and maybe a thermal converter. With low distorion one is free to choose a method different from RMS and still get a stable amplitude. Just for stability the distortion would not even be that critical for stability. It would be however to also get a good DC/AC transfer and also the use with variable frequency.

Filtering the ouput of the amplitude detector is tricky, as it is inside a control loop and thus needs to take care about loop stability, not just ripple suppression. The control side of the amplitde regulation is also nonlinear and frequency dependent. So the control loop can be a bit tricky.

[TimFox]

I own two Krohn-Hite audio generators that directly generate in-phase and quadrature outputs.  The AGC feedback uses a sample-hold on one output triggered by the zero-crossing of the other to get a DC output with low ripple.

[branadic]

Interesting- I have both Victor's oscillators and a 510. (And an Optimation AC calibrator). I'll try to set up the Victor oscillator to see how stable they are. They use TL431's for a reference and a less sophisticated AC sense for regulation. The distortion is extremely low. Not so sure on the level stability. 

Did you already manage to perform such measurement?
I was thinking about a similar measurement on Victor's 1 kHz oscillator with Datron 4000A as source for the amplitude regulation.

-branadic-

[Jester]

RFL and then Clarke-Hess made an ac/dc voltage standard targeted for calibration of low digit DMMs. 0-1000V. I picked up a non working one up on eBay for dirt cheap and fixed it. Really handy addition to the bench. The repair was a bit tricky.

https://testequipment.center/Products/Clarke-Hess-828