Author Topic: Clearance for conductors in offline SMPS  (Read 1305 times)

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Offline FaringdonTopic starter

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Clearance for conductors in offline SMPS
« on: May 12, 2023, 10:18:47 am »
hi,
https://alternatezone.com/electronics/files/PCBDesignTutorialRevA.pdf

...please could members remind me of the standard for clearances in mains connected SMPS? (what are the required clearances)
The above (kindly by Dave Jones)  on pg 9 i think is it, but need to check if its in the  new EN62368.?

I will then pay the $2.4 for 24 hrs access of EN62368 on EVS.EE Estonia.
'Perfection' is the enemy of 'perfectly satisfactory'
 

Offline jonpaul

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Re: Clearance for conductors in offline SMPS
« Reply #1 on: May 12, 2023, 08:18:24 pm »
FTTS: CM or DM? creep? Strike? Mains V? IEC 610004 transients?

I think you do not pay $2.40 for a standard ....,

J
Jean-Paul  the Internet Dinosaur
 
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Offline FaringdonTopic starter

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Re: Clearance for conductors in offline SMPS
« Reply #2 on: May 13, 2023, 09:28:34 am »
Quote
I think you do not pay $2.40 for a standard ....,
Thanks, pse see attached
'Perfection' is the enemy of 'perfectly satisfactory'
 

Offline FaringdonTopic starter

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Re: Clearance for conductors in offline SMPS
« Reply #3 on: May 16, 2023, 06:13:47 am »
..presumably pollution class is not relevant for PCB internal layers?
'Perfection' is the enemy of 'perfectly satisfactory'
 

Offline Infraviolet

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Re: Clearance for conductors in offline SMPS
« Reply #4 on: May 16, 2023, 08:31:19 pm »
Just making a guess here but:
Perhaps keep them as far apart as the soldering pins for the relevant connector or other high voltage components are? The connector through which the mains wire enters, or anything else specifcally designed for high voltage use, will surely have been designed with the high voltage pins suficiently cleared from each other and from any lower voltage or earth pins to avoid arcing and/or creepage. If the high voltage traces would anywhere need to come any closer together than that minimum distance they are forced to get down to (where they connect to the connector/component pins), that's when you'd need to find out what the minimum safe separation would be, but the pins they connect to will already be at or greater than that minimum safe separation.
 
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Offline dmills

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Re: Clearance for conductors in offline SMPS
« Reply #5 on: May 20, 2023, 07:20:01 pm »
Follow the standards, this stuff gets subtle, doubly so if your eventual product needs to be recognised by a NRTL....

For example, we have a product where there is mains on one side (And some internal planes) of a board and both earth and isolated signal traces on the other, the creepage distances are different between the mains and the two classes of LV trace if you wish to meet UL requirements.

Same product with another 'fun' one, because there can be no single component failure resulting in a dangerous condition we were required to ensure we had TWO layers of FR4 between the HV layers and between the HV and LV doings, two cores, or core and prepreg it mattered not, but there had to be two....

Yea, the standards are complicated, hard to follow and tend to reference each other in some sort of graph theorists fever dream, but they are also the source of much empirical experience about what can happen and what it takes to prevent it from happening.

There is a reason consultants exist in this area, and a reason they are NOT cheap.
 
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