Do you use teardrop in PCB layout?

[Wilson__]

Do you use teardrop in PCB layout?   If so:

Where you use it, PTH pads, Vias, (may be not) SMD pads, Track to track?

Do you use it only on default 0.2mm signal track width (and not on wider power tracks)?

Many thanks

[T3sl4co1l]

I use it on production designs, on request.

Altium's automatic generation seems good enough, and I haven't heard any push-back from it.  Mind, production may optimize the design further after I'm done with it.

It's not very meaningful for proto designs, if that's what you're doing.  It's a production yield optimization -- or, if your footprints (mostly thru pad annular rings) are so insufficient that proto yield even is poor, you should probably address that first(!).

Tim

[Wilson__]

I use it on production designs, on request.

Altium's automatic generation seems good enough, and I haven't heard any push-back from it.  Mind, production may optimize the design further after I'm done with it.

It's not very meaningful for proto designs, if that's what you're doing.  It's a production yield optimization -- or, if your footprints (mostly thru pad annular rings) are so insufficient that proto yield even is poor, you should probably address that first(!).

Tim

Apparently, pcb factories are quite good since usb-c and 0.5mm IC are widely used nowadays. 

KiCad defaults to no teardrop for 0.2mm track width.  May be suggesting no teardrop???

[shabaz]

I tried the teardrops feature in KiCad for the first time the other day. I did it for no reason other than just curiosity.

The attached screenshot shows the KiCad config I used for the through-hole pads for a typical 0.1" pitch pin header; you can see the result in the photo (JLC PCB).
 

[screwbreaker]

I do, even in prototypes if I can.

It makes the junction between tracks and vias more reliable, especially when you start soldering on it.

On prototypes often you have to solder/desolder stuff many times, and a tiny track can easily break, with a teardrop it became more robust.

The only downside, when I used it on altium, is that you have to remember to regenerate them every time you do some change on the PCB. Otherwise you can end with random poligons here and there.