You can use more than one external SRAM in parallel. For 16 bit 2 MB you need 21 address lines, 16 data lines, and 3 control lines (2, if CE is always on), so 40 lines per 2 MB chip. There are 240 QFP pin FPGAs like an old Cyclone II, which is sufficient for your project, with 142 usable IOs. 3 SRAM chips would be no problem for it and you would still have 22 IOs for parallel video output (VGA would be the simplest way, 4 bit R2R per color component) and for buttons, LEDs etc. This would simplify the design, because you could use one SRAM for the Z80 and z8002s, and another one or two for the graphics RAMs, which might need to be faster so that you can't share it with the CPU RAMs. And it can be done with a 2 layer board and soldering is no problem.
A general purpose FPGA board with 3 x 2 MB SRAMs, 16 bit data bus, could be useful for other projects as well.