Want wide tracks for power distribution. But what about tight pin-pitch devices?

[julian1]

I want larger width tracks for power distribution/supplies.

Eg. But then if I want 3.3V to use 1mm instead of 0.250 then I cannot route to tight pin-pitch devices - as a single netlist implies a single track width.

Should I be using net-ties?
 
What do others do?

[Bassman59]

I want larger width tracks for power distribution/supplies.

Eg. But then if I want 3.3V to use 1mm instead of 0.250 then I cannot route to tight pin-pitch devices - as a single netlist implies a single track width.

Should I be using net-ties?
 
What do others do?

Neck down the traces at the pins.

Or do a plane and connect to the pins with vias.

[fourfathom]

a single netlist implies a single track width.

Bassman59 is right, just neck it down.  A single net does *not* imply a single track width, you can have any width you like on a segment-by-segment basis.

[Bassman59]

I want larger width tracks for power distribution/supplies.

Eg. But then if I want 3.3V to use 1mm instead of 0.250 then I cannot route to tight pin-pitch devices - as a single netlist implies a single track width.

Should I be using net-ties?
 
What do others do?

Neck down the traces at the pins.

Or do a plane and connect to the pins with vias.

Let me expand on this.

When you set up net classes with specific design rules (track width and spacing), you're setting up two things.

One is for routing. You tell the tool to just use the net class defaults and the traces you put down will follow the rules. This is handy, so you don't have to thinks about whether you've got the right settings for, say, a digital trace vs an analog trace vs a power trace. Just click and place your tracks.

The other thing is that the net class rules help ensure that you don't violate your fab's design rules regarding trace and space minimums. It's a good idea to always route with immediate design-rule checking enabled (which is the default) so you can't place a trace with a spacing to an adjacent trace that your fab won't build (or won't build for the price you want to pay).

Where this sorta falls down is in the situation you describe -- you want to place thicker power traces but you have to connect to a pad whose spacing to adjacent pads violates your net class rules. So you're stuck -- you can't set the net class rule to have a thicker trace because the DRC will fail if you need to connect to that pad. Thus you have to set the net class rules for the worst case -- the pad -- and remember to set the trace width to a larger value if desired when you're routing elsewhere.

(There are, of course, other reasons why one would set design rules, like to meet space requirements for high-voltage traces.)

[Alti]

What do others do?

Ohms law does not care how you connect tracks to pads. It only cares about counting squares on PCB tracks.
A square 0.25mm x 0.25mm has same resistance as 1mm x 1mm.

[Doctorandus_P]

Net ties are to do special things with nets.
They are currently very crudely implemented in KiCad. It's just a few SMD pads with a bit of copper in between.

Some special things that net ties are usefull for, is to make start GND points. In this case you can connect different GND tracks to the same point, and because KiCad regards them as different nets, it won't try to combine the GND tracks in other area's.

Another use for net ties is for 4 wire measurements on shunt resistors. The net ties connect a pin of the resistor, a fat high current track and a sense line to the same point.

If you click on the icon in KiCad that looks like the screenshot below, then PCBnew will use the same track width for new tracks when you start from an existing track.

Net classes are not thoroughly implemented / enforced yet in KiCad. For example the DRC check only checks for a minimum track width, which is the same for all net classes.

[delfinom]

Net ties are to do special things with nets.
They are currently very crudely implemented in KiCad. It's just a few SMD pads with a bit of copper in between.

Some special things that net ties are usefull for, is to make start GND points. In this case you can connect different GND tracks to the same point, and because KiCad regards them as different nets, it won't try to combine the GND tracks in other area's.

Another use for net ties is for 4 wire measurements on shunt resistors. The net ties connect a pin of the resistor, a fat high current track and a sense line to the same point.

If you click on the icon in KiCad that looks like the screenshot below, then PCBnew will use the same track width for new tracks when you start from an existing track.

Net classes are not thoroughly implemented / enforced yet in KiCad. For example the DRC check only checks for a minimum track width, which is the same for all net classes.

DRC recently got a complete overhaul in the nightlies to make it more useful, one benefit is you can now script DRC

https://pbs.twimg.com/media/EiMCJkPXsAEWRd4?format=png&name=medium