Tektronix TDS744 CRT to LCD color converter FPGA module DIY

[ltarjanyi75]

Hello Terry,

Good to hear, that your solution finally works. Did you manage somehow to solder the LED/diode to the same board you made the photo of before, or did you designe another board?

I have a Spartan 6 and it also does not contain clamp diodes. Unfortunately I have not checked it before and I designed my "plug in board" like yours for my Spartan 6 devboard with only serial resistors. And of course it is already in production...
Now I'm thinking how I would replace the resistors for the LED/Diode combo at the same place, without redesigning and producing a modified PCB.
Btw, would the LED/diode combo work for all signals? Why it is only important for data lines and clock? (because of 3-state data lines and importance of clear clock?)

[TerrySt]

Yes, I managed to add the led/diode to my existing board.  It wasn't easy, and it isn't pretty, but it let me test it.  I did it only on the data and clock lines because it was so difficult to do that I didn't want to do it on all the lines.  It is most important on the data lines because they are not just high/low.  They also go tri-state.  This left the inputs to the level shifter ICs floating, which is bad because it causes high currents in the IC and even oscillations.  This was causing a lot of noise on my board.  I also wanted to remove the clock from the level converter IC since there was noise from the other signals on that IC getting coupled into the clock.  Changing just the data and clock signals reduced the clock jitter enough to allow the PLL in the Spartan to give a good phase locked 175MHz clock for the lvds lcd.
I did a re-spin of the pcb which will use the led/diodes on all of the lines.  The parts I used are very small:
LED:  DigiKey p/n 732-12015-1 (0603 package)
Schottky diode:  DigiKey 641-1784 (SOD523 package)
You need good eyes (I have a microscope) and patience to solder them by hand.

Another way that would work for your case is to use your series resistor but add the schottky diodes from the input of the FPGA to the 3.3V supply.  That should work, but will slow the rise/fall times to the signals slightly depending on the resistor value.  The value is a trade-off between speed and how how current is drawn from the signal lines when the diode conducts.  I the case of 330 Ohm resistors, that would be (5v - 3.3v - 0.2v)/330 = 4.5mA.
The led/diode method doesn't slow the signals and doesn't draw any extra current from the signal lines.

Terry

[TerrySt]

The lcd looks great.  The colors and contrast look really good to me.  It is hard to take a picture that looks as good as it does live.  I've just got it taped in place in the scope and still have the protective plastic cover on the screen so the reflections are bad in the photo.  I will make a mounting bezel for it and try to find some sort of anti-reflective plastic or glass protection cover for it.
This is the G065VN01 V2.  The backlight brightness is set to about 50%, which seems plenty bright.

[Tantratron]

All my congratulations Terry, bravo.

Regarding the intensity control, namely the selected Waveform % with the selected text % and how your FPGA code generating the PWM duty cycle for LED back light signal, how did you set the specifoc algorithm fusing each % request ?

Albert

[ltarjanyi75]

I agree with Albert, nice work Terry! The LCD screen looks great!

If I'm not mistaken, the brightness can be set by the dip switches on the board.

[TerrySt]

Yes, the backlight intensity is just set by the DIP switch on the board I made.  I had planned on using a potentiometer to set it, but unfortunately the FPGA board I am using did not route out the input pin for the ADC channel to the low density pins.  So instead I just convert the DIP switch setting to a PWM value.

Terry

[TerrySt]

Just to be clear, the DIP switches just set the backlight level.  The intensity of the traces, text and graticules is still set by the o'scope using the RGB values written to the overlay and palette registers.  I checked that the intensity adjustments from the scope work and they do.

Terry

[TERRA Operative]

Nice work! How do the side and bottom menus line up with the soft-buttons?

Will you open-source the design, or provide gerbers or a kit? I have a TDS784D and a TDS794D that could both get an upgrade....
I wonder if making a board to do away with the dev board, if the backlight brightness could be tied in with the intensity adjustment from the scope controls?


Also, is the difference between V1 and V2 LCD panels just the interface type?

[TerrySt]

I'm happy to share the design files.  I'll post the KiCad schematic and pcb files here once I check out the latest board spin.  But the pcb files might not be of use to anyone unless they also have a TDS524A since the way I made the pcb it mechanically fits the mounting points on scope and lines up with the RAMDAC chip.  I doubt any other models would share the same dimensions.
I will also post the vhdl code I that I used to convert from Vincent's code for the old version of the lcd to the new serial interface version.  And since I was doing this project mainly as a reason to learn vhdl, I re-wrote the entire code starting from scratch.  I did not use the State Machine approach that Vincent used.  I found it easier to understand that way.  I'll post that version after a bit more testing.
I don't know if there is any difference in the lcd panels between V1 and V2 other than the interface and the backlight.  The size is the same.  It fits the scope really well. Ill add a picture with the menus active.
The intensity adjustments from the scope controls are still active.  The scope adjusts the intensity of the traces and text and grid by changing the values in the palette and overlay registers.  There is no analog intensity adjustment in the scope.  So it works with the lcd just as it did with the crt.  I tested the trace and Text/Graticule intensity adjustments and they work perfectly.

The colors on the lcd are much better live.  The camera in my phone makes them look splotchy.  They are actually very solid and bright.

Terry

[TERRA Operative]

Schematics would be awesome, I can lay out a version to fit my scopes, although the processor boards are reused between multiple models so it's likely your design would fit a number of different scope models.

This would mean that only a few different PCB designs would be needed to cover all models.

[Tantratron]

I'm happy to share the design files.  I'll post the KiCad schematic and pcb files here once I check out the latest board spin.  But the pcb files might not be of use to anyone unless they also have a TDS524A since the way I made the pcb it mechanically fits the mounting points on scope and lines up with the RAMDAC chip.  I doubt any other models would share the same dimensions.

I never had older TDSxxx versions except one TDS510A, other 8 models I've reconditionned were C or D serie. The TDS510A even 68020 engine based instead of later 68040 for A11 board do use the same layout for video section than any C or D serie, probably same for TDS7x4A. However I've found one picture of your TDS524A board from internet (see attached with YELLOW arrow) where now I see the mechanical problem or say the U199 chip (RAMDAC) being quite close from fan unit whereas later models position U199 much further away mechanically.

Saying this, I really doubt from a firmware or electrical video signal (analog, digital) any difference, tektronix kept for all versions the same video concept wether mono-CRT or color-CRT hence your work is very valuable for TDSxxx community.

[TERRA Operative]

I just ordered a couple LCD panels for my TDS784D and TDS794D, another fun project to add to the list.

Once they arrive, I'll have a go at designing a bezel/mount. Maybe sheet metal, maybe 3D printable?
Sheet metal has more strength and 'permanence', 3D printable is easier for anyone to make.

Or, "Why not both?" Choice is good. Let's see what way will work best when the panels arrive.

[Tantratron]

I just ordered a couple LCD panels for my TDS784D and TDS794D, another fun project to add to the list.

Where did you order them ?
Are there new or used ?

[TERRA Operative]

I just grabbed these ones.
https://www.ebay.com/itm/314600953560
Not sure if they are new, but the images suggest so (for little that it's worth).

I'll know if they are any good when they arrive....

[TerrySt]

The new board works.  Here are PDFs of the schematics.  There are two boards.  The main board and a board that has just the socket for the RAMDAC.  This is so the height of the main board can be set to allow the mechanical mounting points in the o'scope to be used.

Terry

[TerrySt]

Here are the KiCad design files.  The socket I am using is the Methode p/n 213044401 through hole.  I modified it by milling away the raised areas on the bottom of the socket so that it would sit down further onto the RamDAC chip.  I also re-shaped the contacts in the socket to allow them to grip the RamDAC chip better.  It seems to work OK after those changes.  I never found a socket that worked really well without modifications.  The closest one I could find is the Methode p/n 213044601 surface mount socket.  It can be made to make contact (with a bit of a struggle), but will pop off a little too easily for my taste.  Another socket that can be modified to work is the ASSMAN A-CCS-044-G-T (DigiKey p/n AE10064-ND).  It requires less milling of the bottom (just four small posts that can be cut off with a sharp exact-o knife), but the contacts must be removed individually and re-shaped one by one.   The design of the Methode through hole socket allows all of the contacts in a row to be shaped at once, which yields more consistent results.  I made a small bar out of aluminum that allowed me to bend the contacts around it to get the desired shape.
You also need to source the various cables to connect the board to the o'scope and lcd.  No cables came with the lcd I purchased.  For the backlight cable, I ordered a DigiKey WM15267-ND.  But I had to swap the pins at one end to reverse the order of the pins.  The board is laid out for a 1:1 cable, but the cable as supplied by DigiKey reverses the order of the pins.
For the LCD connector, I ordered several from various places on eBay and AliExpress.  I was looking for one a little longer than 250mm but could never find one.  250mm works in my o'scope, but not much to spare.  I think I ended up using this one:  https://www.ebay.com/itm/202290058359, but I'm not sure. 
For the connection from the o'scope to the board, I used DigiKey p/n H3CCH-1606G-N.  It is a little long, but not too much.
I used a Spartan 7 dev board from Trenz.  It was the smallest dev board I could find for a reasonable cost.  Others would work (with a new pcb layout of course).  The Spartan 7 is much larger than needed.  The design I ended up using only uses 49 FFs and 81 LUTs.  Just be sure what you choose supports a PLL or MMC module that can provide the 175MHz clock for the lvds interface to the lcd panel.  It needs to be phase locked to the 25MHz clock from the o'scope.  The CMOD S7 from Digilent would certainly work, but is a little larger.  I am already thinking about a new version with an FPGA instead of an FPGA dev board.  That might allow me to use the lvds outputs of the FPGA instead of having to use the lvds converter chips.

Terry

[TerrySt]

Here is the VHDL code that is based on Vincent's code but with modifications for the serial interface on the V2 version of the LCD panel, and the backlight and reset changes that go with the new design.  It works OK, but will occasionally display the wrong colors as settings are changed that affect the palette or overlays.  Such as when the colors are changed, or the intensity settings are changed.  It works 99% of the time, but occasionally glitches.  It is 100% stable when the color, palette or intensity settings aren't being changed.
I was trying to debug the glitches, but I decided to just start over with my own code from scratch so that I understood it better.  That version seems to be simpler (to me anyway) and is 100% stable.  I'll post it also.
First, the version based on Vincent's code is attached.

Terry

[ltarjanyi75]

Hi Terry,

Why can't you use the LVDS of the FPGA with the devboard? Isn't its LVDS outputs available on your devboard?

Btw I am now planning a small board with a Spartan 3. The board will be small (44*41mm) which is ok from the point of fitting on top of the RAMDAC, but I don't know if I will be able to solder it...

Thanks,
Laszlo

[TerrySt]

And here is the version I created from scratch.  This is my first attempt at VHDL coding, so no guarantees.  I'm not sure how to attach the automatically generated clock wizard files, so if you need some other files you will have to let me know or just generate them yourself (easy using the clocking wizard in Vivado). 

Terry

[TerrySt]

Hi Terry,

Why can't you use the LVDS of the FPGA with the devboard? Isn't its LVDS outputs available on your devboard?

Btw I am now planning a small board with a Spartan 3. The board will be small (44*41mm) which is ok from the point of fitting on top of the RAMDAC, but I don't know if I will be able to solder it...

Thanks,
Laszlo

None of the dev boards that I could find (at least the reasonably priced ones) allow you to set the voltages on the FPGA to the voltage required by the LVDS interface.  They all seem to be set to 3.3V, and for LVDS you must set the domain voltage to 2.5V.

I don't know anything about the Spartan 3, but it should be fine as long as it can generate the phase locked 17MHz clock.

Terry

[Tantratron]

I used a Spartan 7 dev board from Trenz.  It was the smallest dev board I could find for a reasonable cost.  Others would work (with a new pcb layout of course).  The Spartan 7 is much larger than needed.  The design I ended up using only uses 49 FFs and 81 LUTs.  Just be sure what you choose supports a PLL or MMC module that can provide the 175MHz clock for the lvds interface to the lcd panel.  It needs to be phase locked to the 25MHz clock from the o'scope.

The owner of Simmcon labs has used a Spartan 3 (model XC3S50A), do you know if this is enough to implement 49 FFs (Flip-Flop) and 81 LUTs (Look Up Table) or he was super experimented to optimize its code with much lesser CLBs (Configurable Logic Blocks) ?

None of the dev boards that I could find (at least the reasonably priced ones) allow you to set the voltages on the FPGA to the voltage required by the LVDS interface.  They all seem to be set to 3.3V, and for LVDS you must set the domain voltage to 2.5V

Interesting which explains now why Simmconn labs uses a local 1.2 Vdc regulator because when we see the G065VN01 V2 datasheet (page 11/24), it mesntions for LVDS the differential input common voltage VCM to be between 1.1V and 1.45V (typical 1.2 V) for best threshold detection.

Albert

[TerrySt]

I used a Spartan 7 dev board from Trenz.  It was the smallest dev board I could find for a reasonable cost.  Others would work (with a new pcb layout of course).  The Spartan 7 is much larger than needed.  The design I ended up using only uses 49 FFs and 81 LUTs.  Just be sure what you choose supports a PLL or MMC module that can provide the 175MHz clock for the lvds interface to the lcd panel.  It needs to be phase locked to the 25MHz clock from the o'scope.

The owner of Simmcon labs has used a Spartan 3 (model XC3S50A), do you know if this is enough to implement 49 FFs (Flip-Flop) and 81 LUTs (Look Up Table) or he was super experimented to optimize its code with much lesser CLBs (Configurable Logic Blocks) ?

None of the dev boards that I could find (at least the reasonably priced ones) allow you to set the voltages on the FPGA to the voltage required by the LVDS interface.  They all seem to be set to 3.3V, and for LVDS you must set the domain voltage to 2.5V

Interesting which explains now why Simmconn labs uses a local 1.2 Vdc regulator because when we see the G065VN01 V2 datasheet (page 11/24), it mesntions for LVDS the differential input common voltage VCM to be between 1.1V and 1.45V (typical 1.2 V) for best threshold detection.

Albert

I don't know anything about Spartan 3 but I bet even the smallest Spartan 3 has enough resources for this job.  You just need to make sure the version you choose has enough I/O.  Watch out for the way the I/O banks are defined.  You can't mix voltages in a bank.  So if you decide a bank is 3.3V for the I/O, then all of that bank is 3.3V.  I don't know if the Spartan 3 supports lvds in all of the devices or on all banks or what other restrictions there might be. 
The 1.2V is probably the core voltage.  It looks like the lvds requires 2.5 or 3.3V on the Spartan 3.
I would use the Spartan 3 except it looks like the only tools available are the ISE that only works on Win7 or Linux.  I'm not sure I want to mess with setting up a VM to run either Win7 or Linux.  What tool are you using?

Terry

[Tantratron]

I would use the Spartan 3 except it looks like the only tools available are the ISE that only works on Win7 or Linux.  I'm not sure I want to mess with setting up a VM to run either Win7 or Linux.  What tool are you using?

I'm using MacOS being quite faithfull to Apple since 1986

[TerrySt]

I would use the Spartan 3 except it looks like the only tools available are the ISE that only works on Win7 or Linux.  I'm not sure I want to mess with setting up a VM to run either Win7 or Linux.  What tool are you using?

I'm using MacOS being quite faithfull to Apple since 1986

Is ISE supported on MacOS?

[ltarjanyi75]

Hi,

Spartan 3 (model XC3S50A) should be fine, since SimmconnLabs use it in their design with LVDS also. They have an onboard 1.2V converter and 3.3V as input. 1.2V is used as internal supply voltage in Spartan 3.

I tested the G065VN01 V2 display with a Spartan 6 devboard bought from Aliexpress (Xilinx spartan6 XC6SLX16). It's VCCO and VCCAUX pins are connected to 3.3V and VCCINT (internal supply voltage) to 1.2V, no sign of any 2.5V either... I measured the voltage levels on LVDS output clock signal and it changes approx between 1.1V and 1.45V. What is strange that it is the same even if I set the LVDS output pins IOSTANDARD to LVDS_33 or LVDS_25... (Or I do something wrong...)

ISE can be installed and run on Windows 10 (there are other topics on the net), the issue for me is the IMPACT tool to download the compiled code to the FPGA. It does not work with my Xilinx platform cable (chinese clone) only trough Virtual Machine setup. At least I can develop in Windows 10 and to use the files from same project folder under VM to download the compiled code to FPGA.

Bye,
Laszlo