Here are some pictures of the internals of my DS2072A, including images of the input stage under the RF shield, for those interested.
My version info is:
Serial: DS2D....
Hardware version: 1.0.2.0.2
FPGA version:
SPU: 03.01.09
WPU: 00.07.01
CCU: 12.29.00
MCU: 02.13
Also, I can confirm that tirulerbach's keygen works nicely (scope now thinks it is a DS2202A
![ThumbsUp :-+](https://www.eevblog.com/forum/Smileys/default/icon_smile_thumbsup.gif.pagespeed.ce._JElyJQqdB.gif)
). I'll try to take some bandwidth measurements hopefully soon and report back...
Hopefully the image names make sense (feel free to ask for clarification). Some of the close-ups are low resolution unfortunately, because I could only get a cheap USB microscope in there without further disassembly.
Another thing I thought of that tirulerbach mentioned about the JTAG connection: You shouldn't need the pull-ups at all as long as your adapter is driving the nTRST and nSRST lines high (my FT2232H-based adapter does that, and I assume almost all would). If you use the pull-ups you don't need to connect those lines to your adapter at all--just leave them pulled-high for the mem dump.
Hope the images are useful !
(full back image, jumper image, and one input stage image attached, all in .zip)
https://mega.co.nz/#!I89GxaqI!bTPeSVsWpN8jEXoa44ejMDz3aOM5A-zmMqczeo_31c8