Check the F1C200s manual, also the OC package.
You can read the CPU/SDRAM PLL registers, which is what the script does.
Default is 408MHz CPU, 156MHz RAM.
Start with only the CPU, usually 600MHz is a safe start point, but as long as you use the "test" variant of the script, the values are read from the USB, so there's no risk.
The RAM is more picky, might not overclock at all, and will rarely reach 192MHz in the best cases.
Mine runs 792/180. I have a light overvolt 0f 80mV (1.18V).
Recently, reading the registers I found the I2C bus was running at only 46KHz.
Not sure if it's on purpose to reduce signal noise or a bug, but it worked well past 600KHz, even 800KHz, I noticed a better system response, expected since the FPGA is controlled using this bus.
Run these commands for the desired speed. If it crashes, just cycle the power, it's not permanent.
# Set I2C bus to 46KHz (Default)
devmem 0x1C27014 32 0x63
# Set I2C bus to 400KHz
devmem 0x1C27014 32 0x12
# Set I2C bus to 600KHz
devmem 0x1C27014 32 0x0A
# Set I2C bus to 800KHz
devmem 0x1C27014 32 0x11
Also tested increasing the internal bus speed from 600 to 768MHz, this caused some issues as the peripherals use this clock, could reconfigure the serial port baudrate register but still in testing stage.
I think the overall system bottleneck is the communication between the CPU and FPGA.
Needs a lot more testing before I release anything.