New Hantek DSO2X1X models?

[pcprogrammer]

Well if the assumption about the ADC hardware is correct it is capable of doing 1GSa/s. That makes it less of a lie compared to the FNIRSI-1013D and 1014D. They have 1GSa/s printed on the front, but only have 100MSa/s per ADC hardware in there. With 2 ADC's per channel still only 200MSa/s. Also on the back of the device a label that states 240Kbits of sample memory, which is also false because most of the time it only uses 1500 bytes (12000 bits) per channel.

So FNIRSI is a bigger liar then Hantek

I agree that knowing the truth about these devices would most likely drop sales and steer people to the better brands. You have to pay more for sure, but do get better equipment.

[DavidAlfa]

Haha, damn liars.
What initially seems a "good" idea to boost sales, is going destroy their already weak reputation.
If tomorrow Hantek releases a new DSOxxxx with 12" UHD screen, 24-bit 10GSA/s ADC, 100M depth, 16ch, and for just $500, will I buy it?
NO

Hah, the SPI decoder can't handle more than 16-20MHz... (0x29 is the correct one)

[pcprogrammer]

Here is why it can't use the memory when sampling at 1GSa/s, at least if the FPGA used is a GW2AR-18. It has the required number of LVDS pairs to connect the ADC.

The SDRAM in the FPGA has a max clock of 166MHz with a 32 bit wide data bus. The ADC delivers the data also 32 bits wide but with a clock of 250MHz when sampling on 1GSa/s, or with 2 channels enabled on 500MSa/s. At least if the ADC is the ADC08D500 mentioned before.

For these higher sampling rates it can use the BSRAM of which it has 828Kbits. This memory can clock up to 380MHz. But still a FPGA design running on a master clock of 250MHz takes skill.

[DavidAlfa]

I know these limitations, as I already said, I'm not blaming the hardware, but HANTEK.
Should I need to reverse-engineer the whole thing to get the real specs? Absolutely not.

As far as I remember, the ADC can pack the data, that's why it can provide 1GSA/s at 250MHz, each transfer is made of 4 8-bit samples.
The part that annoyes me most is the 40K issue. Says 500MSa's, so it should be great for zooming into small details, but it's complteley useless.

Another day in paradise 

[vistorik]

David, is there a way to determine the frequency at which the central CPU and the memory operate? What are the default CPU and memory frequencies? Thanks in advance.

[DavidAlfa]

Check the F1C200s manual, also the OC package.
You can read the CPU/SDRAM PLL registers, which is what the script does.

Default is 408MHz CPU, 156MHz RAM.

Start with only the CPU, usually 600MHz is a safe start point, but as long as you use the "test" variant of the script, the values are read from the USB, so there's no risk.

The RAM is more picky, might not overclock at all, and will rarely reach 192MHz in the best cases.
Mine runs 792/180. I have a light overvolt 0f 80mV (1.18V).

Recently, reading the registers I found the I2C bus was running at only 46KHz.
Not sure if it's on purpose to reduce signal noise or a bug, but it worked well past 600KHz, even 800KHz, I noticed a better system response, expected since the FPGA is controlled using this bus.
Run these commands for the desired speed. If it crashes, just cycle the power, it's not permanent.

Code: [Select]

# Set I2C bus to 46KHz (Default)
devmem 0x1C27014 32 0x63

# Set I2C bus to 400KHz
devmem 0x1C27014 32 0x12

# Set I2C bus to 600KHz
devmem 0x1C27014 32 0x0A

# Set I2C bus to 800KHz
devmem 0x1C27014 32 0x11

Also tested increasing the internal bus speed from 600 to 768MHz, this caused some issues as the peripherals use this clock, could reconfigure the serial port baudrate register but still in testing stage.

I think the overall system bottleneck is the communication between the CPU and FPGA.
 
Needs a lot more testing before I release anything.

[azx987sa]

Code: [Select]

# Set I2C bus to 46KHz (Default)
devmem 0x1C27014 32 0x63

# Set I2C bus to 400KHz
devmem 0x1C27014 32 0x12

# Set I2C bus to 600KHz
devmem 0x1C27014 32 0x0A

# Set I2C bus to 800KHz
devmem 0x1C27014 32 0x11


What is the way to run the command?

[azx987sa]

Thanks David for what you are doing.

 I have a light overvolt 0f 80mV (1.18V).

you can learn more about how to get 1.18 volts?

[DavidAlfa]

Serial port or Script Launcher (check the FAQ), also in overclock files, you could append it at the end of oc_manager and oc_manager_test.
The regulator requires modifying the resistor feedback in the board, I don't recommend that unless you know what you're doing, any mistake could fry everything with 5V.
Stock voltage will usually work up to 648-696MHz, doesn't really worth the risk.

[azx987sa]

Can you show the elements of the feedback controller? I understand my responsibility if it fails.
Thanks

[azx987sa]

Oh David, thanks for the hard work!

oc_manager_test
CPU_OC_PLL_N=28
MEM_OC_PLL_N=16
# Set I2C bus to 800KHz
devmem 0x1C27014 32 0x11

DSO has become more responsive! Work has become more convenient!

[DavidAlfa]

Check this, this and the attached picture.
Remember the 1.1V rail also powers the FPGA!
That RAM is a a bit too high. You'll know if it feeezes when booting from cold. Or you might be lucky!
I also tried overvolting the RAM, but any higher had a negative impact.

[azx987sa]

Remember the 1.1V rail also powers the FPGA!

I plan to power the processor from a separate voltage source. I cut off the tracks.
Any information on the processor model?

[DavidAlfa]

What about reading this thread, also the "Hacking" one? F1c200s everywhere. Datasheet on my Drive...

[azx987sa]

What about reading this thread, also the "Hacking" one? F1c200s everywhere. Datasheet on my Drive...

There are translation problems. I would be grateful if you answer the obvious questions with a link. This will be enough.
Thank you.

[DavidAlfa]

Check the f1c200s datasheet and user manual here

[glenp]

I'm looking at getting one of these but have a question...

Is it worth chancing the AWG components will be on the delivered unit and getting the 2C10 or should I just go for the 2D10?


Glen.

[Maxie]

I haven't had time to play around with the oscope the past 1 or 2 months, but this weekend I found some more bugs.
I see DavidAlfa discovered a lot of issues as well. Do you guys report these findings to Hantek?
What happened to the initiative of collecting all problems found in a central document? Is it still a thing?

[Maxie]

I'm looking at getting one of these but have a question...
Is it worth chancing the AWG components will be on the delivered unit and getting the 2C10 or should I just go for the 2D10?

We can't answer this question. You have to decide if you need/want the AWG func.
Look at it this way. How much will you be disappointed if you chance it and don't get it.
What is the price diff? How much is the stress/peace of mind worth?

I, for one love the AWG. People say its dumb/simple. Maybe it is, but it's damn better than a 555 sq wave gen.
Probably they compare it to a 1000 bucks Keithley or something.
It's got many different waveforms, adjustable freq, amplitude, DC offset, duty cycle, several modulation types and even those have more settings.
I only wish there was 2 of them. Now I want to get another AFG, but they cost too much, and I would probably only use it for f*kin about with XY mode.

[glenp]

The 2C10 is running at AU$259 and the 2D10 is running at AU$319 on amazon.com.au at the moment, so not a huge difference.
I think I could make use of the AWG (one less thing to need to put together/buy) so my thinking is I'd go with the 2D10 and flash it up to a 2D15 from there.

Does overclocking it required the passive heatsinks and a fan installed, or can it handle it with just the heatsink?  (not that it seems a hard mod)

Thanks for your reply Maxie, you basically just validated my thinking.

[dirtmover]

I'm looking at getting one of these but have a question...

Is it worth chancing the AWG components will be on the delivered unit and getting the 2C10 or should I just go for the 2D10?


Glen.

If it helps any, I hummed and hawed over the same question and eventually decided the awg would be nice to have but it was really a 'scope I was interested in so took a punt on the C10. I ordered from Banggood on 23rd March and I now have a fully functional D15. Worked out well for me but of course YMMV.

[Maxie]

Cyril has uploaded a new 3204 fpga FW that was factory installed on his new scope.
I'd like to test it, but it's a BIN file, it should be UPK.
DavidAlfa, could you please create a FW changer for it?

[DavidAlfa]

Added.

[Maxie]

I tested 3204 on my fpga, it works fine. I used to have the signal spikes issue with 3202 on deep memory settings that was fixed in version 3203. I could not find any difference playing with all kinds of waveforms and timebases on both channels for half an hour.
I wonder what they changed in this new version. Maybe while in there they found something else we don't know about, or could be they just standardized the latest fpga FW to work on all scopes. I remember some folks had problems when testing 3203.
If anyone tests please report back if you see any differences.
Me, I'm staying on 3204 for now, untill I find something that's wrong.

[lostcontrol]

Hi all,

I'm the one who uploaded the 3204 firmware. I didn't managed to get the UART decoder to work properly up to now. I can trigger on specific data for example, this works nicely but I never managed to see the live decoding. The purple text is always showing "please, adjust the time base". Do you guys manage to get it work? Is this a regression from 3204 (I doubt but who knows).

Thanks