It may be
from reload_fpga.sh
is declared as option for --default command option
default_fw_path=/rigol/FPGA/BOOT.bit
default_download_addr=0x000000
But there is no BOOT.bit only bin
bit file is SPU_H12S1.bit I don;t know what is used for.
Also looking at that script I see that after doing and inserting xdma.ko module check for a file and based on that set FPGA boot address
That script is jacked in some ways. It appears Rigol took some other script and just jacked it up to "work" with the GEL update script.
the syntax has $1 and $2 as args
Syntax is $1 only , it must be "--default", or you must pass actual $1 and $2
$1 = --default will run the update on the default addr using "BOOT.bit". I simply cp-paste BOOT.bin to BOOT.bit and it works fine.
$1 and $2 args (file and address) and the script uses those for spi2erase and spi2flash and spi2boot, using the $2 address for boot and in setprop
However, if I run script from FPGA dir, passing "BOOT.bin 0x400000" as args, getprop for boot addr still shows 0x00000
spi2flash wont accept "0x000000" as addr, err's with "must be at least 0x400000 (4MB)". So it's not clear to me how default in script is "0x000000".
spi2flash addr arg must be how big space to flash into, does not appear where to park the start of the flash image. Which is interesting because of the FPGA boot addr found in the startup script in /rigol/shell/
If I try and flash BOOT.bin into addr arg 0x800000, the running system will panic and reboot. Probably have stepped on xdma0 in doing that flash, which I assume the tool padded out to 8MB.
So, some more digging in this area is needed.