Fremen67, guys, you're still around, not much activity over WE .
Well this is not exactly what I would say.
I decided this Saturday evening to have a one hour session on the FP-FPGA protocol decoding to see what I could find. What happened to me was worse than being attracted by a black hole. My last two evenings where long… my last to nights were short. This thing is more addictive than drugs.
First I decided to add the nor flash into the game. Cybermaus already explained precisely how it was organized, containing the predefined waveforms and the arbitrary waveforms as well. As I did a backup of the flash, I already had the header pins soldered. A quick check at the Flash_CLK pin showed that it was running @ 20Mhz. So definitely a separated SPI bus that has to be connected to the FPGA. Five pins connected later, and after adding a second SPI protocol in the LA configuration, I was able to see the flash talking synchronized with the FPGA-FP telegrams when switching waveforms. So far so good. But that was just the beginning of the black hole thing… Long story short..The service telegrams are now decoded (containing mode, state, setpoints of CH1&CH2) and the Read mechanism from Flash to FPGA, From Flash to FP and Write from FP to Flash is now clear, that is:
1- Direct transfer requests of waveforms from Flash to FPGA (FP don’t see the values)
2- Read requests from flash to FP, FPGA being a letter box
3- Write requests from FP to flash, FPGA being again a letter box (when using the PC software)
All the captures I made showed a combination of those mechanisms in Power On, ON/OFF, waveform selection, setpoint modification telegrams.
There is also a specific telegram when in Measure Mode but it is much simpler and smaller, for reading counter, frequency and the 2 half parts of a cyclic input signal.
You will find attached a description overview of the registers, new ones, some of them still to be identified, others already identified by DC1MC who also already explained the register write mechanism.
With this file, every one should be able to decode almost all the messages that we captured. The main missing registers are used during the power ON sequence, I suppose for initialization purposes but no clue for them at the moment.
I will post some other documents later on too that might help understanding the mechanism and will also try to explain more precisely the read/write protocol.
Not sure how long I will stay awaken ...
Enjoy!
Hello everybody, quick update for the startup sequence, it mostly consists of endless reads, WITHOUT sending an address, the readback values are some times a string off zeros or a string of 0x00000001.
Should be crystal clear now...
Holly rotating cow on 3D gymball, fremen67 are you a younger version of me ?!?! I remember ca 35 years ago disassembling the Sinclair Spectrum ROM with just a pencil, a paper notebook and bootleg copy of Z80 manual. Painful, but somehow you wake up in an excellent mood, better than the other thing That's a real effort here people, the WE silence was bringing us so much stuff, thank you so much, chapeau bas
. I was coming very late yesterday from the Arbeit, and only this morning I had a look at the headmounted glasses post responses, and observed that there is one more post in the FY6600 topic and casually looked on it, and by Jove, now I have to take some hours off !!!
One quick thing about the register 0x25 (50 million) and 0x26 (500million), they seem to be correlated with the 50MHz oscillator that is used as timebase, in a joyful future we may be able to replace it with a stable 10MHz source, and if these are the only modifications, jackpot
!!! Most likely they are just time base for the frequency measurement, but one can dream
.
I would look in to the triang waveform, can you switch sometime form sine to triang, to see it this time at least it updates the waveform in RAM, or it could be as well yet another bug from our FeeTech guys.
The common measurement along with the flash SPI was really perfect, we need to see edges, where this shitty fw screws thing. I'm really curious where in the MCU firmware are writing operations, because I can understand screwing up the external flash, but I don't understand what had happened with the internal one ?!?!?
What we need now:
- Blue pills board to do a quick serial-to-SPI converter, I'm curious if the Dupont pins are fitting there, then there is no need for connector.
- A set of basic routines, I'll list them there for reference:
= Wait_For_Ready.
= Writer_register
= Set_Register_Address
= Read_Register
And then one level higher routines:
Set_Freq
Set_Level
Set_Offset
Set_Phase
---
and so on
(for the development purposes, these can be emuleted for the moment in a PC program that discuss with the blue pill via serial)
And of course the telegrams ( I like this word, better thane the messages that I was using)
If we get some good news form the members that promised to extract the schematic, we can focus afterwards on how the LCD is driven and see if in the yuuuge library collection from STM there is something compatible, and get rid of the ugly fonts
.
Also in the end ( I have now to run ), it would be sooo nice to have a member with a 30MHz or lower device, trying to program the 59.999 MHz
, revenge at last
Cheers,
DC1MC