I bought a couple of etherdecode boards from Mike and thought I'd share how to use it with an Agilent 16700 series logic analyzer. I have a 16702B with a 16752A acquisition card, but the following should apply to all the combinations of chassis/cards in the 16700 series.
The first thing to note is that the 16700 series already understands various network layers such as TCP, IP, and Ethernet, so it's just a matter of getting the etherdecode data into the analyzer.
The etherdecode board is set up with SW1=OFF and SW2=OFF, and the analyzer is used in state mode (not timing mode).
The etherdecode MARK output is used as a clock input for each data byte (rising edge), and the TRIGGER as a second clock to force a capture at the start and end of the packet (both edges). So, in this configuration, the analyzer only uses one sample memory location per ethernet data byte, plus an additional two for packet start and end.
A "bus" needs to be defined for the analyzer's trigger and packet decode, and that is done through the "Find Packet" selection in the "Trigger Functions" tab. This is where the etherdecode DATA, MARK, and TRIGGER outputs are tied together to define the boundaries and contents of a packet.
In the Listing window, the inverse assembler "INETWRKE" needs to be loaded in order to decode the captured packet headers. Once loaded, the "Max length of packet" in Invasm-->Preferences needs to be adjusted to 1600 from its default of 600 (1500 doesn't quite do it).
The analyzer's full triggering and selective storing is available via pull-down menus for all layers from the Ethernet MAC address through TCP/UDP (beats counting byte offsets!), and there's a trigger out and arm in for other equipment to join in the fun.
I've included a pile of screen shots below to show the flavor of what's possible and the settings I used to get everything to work. In the screen shots I called TRIGGER "InPacket", meaning we're inside a packet, and MARK "Clk", because, well, it's the data clock.
I didn't set up the second etherdecode board to capture the other direction, but there's plenty of inputs on the analyzer and it would just be a duplication of the settings. It's easy to instantiate a second analyzer using the system's dual analyzer feature (in Pod Assignment).
Overall, another useful tool in the box. Thanks, Mike!