I am not designing a board. I'm writing a reliable and I hope portable FOSS DSO FW stack for Zynq and Cyclone V based DSOs. I have a Zybo Z7-20 and a Terasic DE-10 Nano to use for the dev work. The PMOD interface is not available on the Terasic board, so I'll actually have to build two test fixtures.
I fully understand that the vendors have characterized their parts. But the timing calculations for a particular topology are done in software. After many years of dealing with complex, expensive software packages I have *no* confidence that they produce the correct answer. I have constructed test cases that broke far too many codes. My concern is testing a filter configuration and getting a timing result which the part cannot reliably meet.
A key feature I want to implement is the ability to apply an arbitrary series of FIR and IIR filters and math operations to any input trace and display the result in X-T, X-Y or do anything else the user wishes in real time for 8, 12 & 14 bit ADCs e.g. the HMCAD1520.
In short, I am fed up with crappy DSO FW. To keep what little bit of sanity I have left, I need a project which presents a serious technical challenge. This is the project I have chosen. Because I want the code to be portable, I want to know with absolute certainty that a filter topology actually will run properly at design speed on both parts. The only way to achieve that is to measure the behavior of the various elements and arbitrary combinations thereof. This is a multi-year project.