Those mosfet 0.1mm tracks
![Laughing :-DD](https://www.eevblog.com/forum/Smileys/default/smiley_laughing.gif.pagespeed.ce._hfWAz_QHO.gif)
Check
this example, keep power traces as short and thicker as possible.
Move the transistor closer to the connector.
Also increase the width of VDD tracks, just a little, about 12-15th.
Add more decoupling capacitors to the stm32, in every VDD/VDDA pin. This also happens in the original crappy design.
Place the decoupling capacitors closer! C3 placement is terrible, rotate it 90° so the positive is much closer.
Add more vias to join the ground planes, specially close to the stm32, regulator, amplifier... Avoid those barely connected islands like in U3, adjust the traces so the plane isn't broken everywhere.