Programmable Electronic Load, 0-5A

[OM222O]

So just adding a low value resistor in the source of the MOSFET?
I also saw this design that uses a BJT transistor: https://youtu.be/9auu8hH4IPM?list=PLUMG8JNssPPzbr4LydbTcBrhoPlemu5Dt&t=457

Thanks a lot for the advice.

Scully has some great videos detailing the operation, but unfortunately some janky ways of reaching the same means

Best way to achive your desired result is to use a quad op amp, each controlling one mosfet which is connected to a separate source resistor. this way you can:
1) drop the power rating of both your fets and resistors -> cheaper parts
2) use way less parts -> more space on pcb + cost savings

I would strongly suggest you look into the illusive ADS1219, the bigger brother of ADS1115. also you can use X2Y capacitors for your adc input filter for less noise and higher accuracy. costs almost the same as the ADS1115 modules available on amazon but not as popular, so you should but it from mouser or digikey, but I can get about 100uV accuracy or better depending on the application. you can copy my ADC design from this picture:


In terms of mosfets, you can use logic level fets which should give you a better response ... not sure if the 1.4A limit on 1V is caused by the transconductance of the mosfet or not, but it's well worth trying an IRLZ44N. Others have mentioned some high linear SOA IXYS fets which are really expensive in my opinion. you can get better cooling and save cost if you go with 4 cheap fets rather than 1 or 2 expensive ones. also because of higher surface area of separated load, they will be a lot easier to cool (I could get about 20 watts using two passively cooled fets, if you have a fan (which you do) your load capacity will increase drastically) !

3D printed case is a nice idea but will soften and loose shape if your load gets hotter than about 60C which the chances are it will! even if you use ABS it's not much better. a good idea would be to make a silicon mold of your printed parts and creating resin castings from them which are a lot more durable!

one final note would be to use a proper dac instead of a PWM signal ... it depends on your budget to determine if it's worth it or not but a simple first order RC filter you used has some major flaws. you should preferably use a two stage second order filter if you want any decent settling of the voltage and level of accuracy. I strongly recommend a DAC if you can fit it in your budget.

here is a video of an dummy load I made, but it's fully analog as I will be monitoring currents and voltages externally but it was designed for the same purpose of testing battery capacities. you can add the digital parts as you like:


Sorry for the quick and lackluster answer, I'm out of time for now. if you want more details I can answer them later. hope you found this useful and good luck with the project!

[JeanLeMotan]

Scully has some great videos detailing the operation, but unfortunately some janky ways of reaching the same means

Best way to achive your desired result is to use a quad op amp, each controlling one mosfet which is connected to a separate source resistor. this way you can:
1) drop the power rating of both your fets and resistors -> cheaper parts
2) use way less parts -> more space on pcb + cost savings

I'm changing the schematic to do just that now. However I need to use OP27 (or TL072) so that I can adjust the offset voltage - as I need to get down to 0 amps. This prevents me from using a quad opamp, unless there are quad opamps with offst adjustment?

I would strongly suggest you look into the illusive ADS1219, the bigger brother of ADS1115. also you can use X2Y capacitors for your adc input filter for less noise and higher accuracy. costs almost the same as the ADS1115 modules available on amazon but not as popular, so you should but it from mouser or digikey, but I can get about 100uV accuracy or better depending on the application. you can copy my ADC design from this picture:

Thanks for the hint - I actually searched for a higher resolution cheap I2C ADC but somehow missed this one.
I'll consider it for a future revision.

In terms of mosfets, you can use logic level fets which should give you a better response ... not sure if the 1.4A limit on 1V is caused by the transconductance of the mosfet or not, but it's well worth trying an IRLZ44N. Others have mentioned some high linear SOA IXYS fets which are really expensive in my opinion. you can get better cooling and save cost if you go with 4 cheap fets rather than 1 or 2 expensive ones. also because of higher surface area of separated load, they will be a lot easier to cool (I could get about 20 watts using two passively cooled fets, if you have a fan (which you do) your load capacity will increase drastically) !

I did test a lot of logic level MOSFETs and they all died above 12-20V and 1-2A. Their SOA just doesn't go that far.
Maybe with proper opamp balanced load between them (as opposed to simply paralleling them) they would be ok.
The linear mosfet I went for is ~5 euros on digikey so yes, a bit expensive but definitely cheaper than the time I spent trying out logic level mosfets (and killing them)

3D printed case is a nice idea but will soften and loose shape if your load gets hotter than about 60C which the chances are it will! even if you use ABS it's not much better. a good idea would be to make a silicon mold of your printed parts and creating resin castings from them which are a lot more durable!

Good point. I'm using PETG which should start softening at higher temps than PLA. Since I have temperature control and a fan I can prevent the load from reaching this temperature.
To be honest I don't want to open another chapter - case production. Switching between electronics and software is already confusing enough.

one final note would be to use a proper dac instead of a PWM signal ... it depends on your budget to determine if it's worth it or not but a simple first order RC filter you used has some major flaws. you should preferably use a two stage second order filter if you want any decent settling of the voltage and level of accuracy. I strongly recommend a DAC if you can fit it in your budget.

I spent some time searching for DACs but in the end I settled for a PWM for these reasons:
- Higher precision than a (reasonably cheap) DAC. I have my pwm at 18 bits which is overkill, but I'd need a minimum of 13-14 bits for 5A with 1mA precision. If you factor in noise and other issues I think 16 bits become useful.
- It's very linear
- Relatively easy to filter. With the filter used now I get a few mV of noise which translates in... hmm I just did the math and for a 0.1 ohm shunt, 1 mV represents 10 mA... Not good. I need to measure again, filter more or get a DAC


Thanks for the advice and info!

[JeanLeMotan]

I'm working on rev2 schematig, incorporating the advice received so far:

- Opamp controlled MOSFETs, up to 3 of them (arbitrary limit)
- Removed reverse polarity - but will ad it back with opamp control
- Added a voltage ref and a CMOS buffer for PWM control - but I will add a DAC if PWM doesn't cut it
- +/- 12V generated on board using a cheap module
- 3v3 regulation on board so that I need only a 5V input voltage.

Here's the WIP schematic:

[agaelema]

The use of PWM DAC is very interesting and many (maybe old ) programmable voltage references use this technique. I think the biggest tradeoff is the settling time when compared with a conventional DAC.

I don't know if I read about this on the forum or some other site, but there are some ways to minimize the ripple without to much affect the settling time.

Look at this article: https://www.edn.com/design/analog/4459116/Cancel-PWM-DAC-ripple-with-analog-subtraction

I did some simulations on Multisim and the result is very exciting. I also tested on a breadboard and it really works.

[JeanLeMotan]

I redesigned the reference voltage part using a DAC and eliminating the need for offset trimming in the opamps.
What I ended up with is a 16 bit dac with an output of -26mV to 512mV.
The negative voltage is created with opamp U9.3, but I'm not sure if there will be issues with this topology. I simulated it and it worked just fine but since it's smth I 'designed', maybe there is something I missed.
The schematic is attached with some voltages marked.

The other part I redesigned is the load control: this time I'm using a precision quad opamp - OPA4277 - controlling up to 4 mosfets, each with its own shunt resistor. There is another shunt resistor used for the ammeter opamp.

Let me know what you think.

[sundance]

Is there a reason you used Vref as supply voltage (Vdd) for your DAC instead of 3.3V to have a little headroom for the output opamp and to take some load away from Vref?
(I am by no means an expert, just curious...)

[Kleinstein]

The low VDD for the DAC is likely not a good idea. In addition to the problems already mentioned it could cause trouble with the interface to the µC, if there are high voltages.  So Vdd should be more likely the µC supply with some RC or LC filtering.

The amplification and level shift after the DAC does not work this way. The OPs inputs are swapped.

The OP4277 is a slightly odd and expensive choice, as it's made for relatively high impedance source. The power stages likely need to be separated a little anyway to have space for the heat sink a quad OP is also odd.

Using a parallel / series combination of 0.1 Ohms resistors is prone to add extra copper resistance and thus not really accurate. Also many small resistors close together, especially in SMD form factor have difficulties in getting the heat away. So putting 4 SMD 250 mW resistors may be more like a 500 mW resistor.

With presumably the same resistors used, it does not make that much sense to have a separate shunt for the total current. With some care in the layout, one could just combine the average voltage of the resistors at the current regulators. A separate shunt for the total would make sense, if one good quality shunt is used. The power stages could than also use simpler resistors and even simpler OPs, with one more OP to make sure the overall current is right.

To really warrant a 16 bit DAC the shunt should be really high quality and not too low in power, to avoid errors from self heating.  So for a 5 A total current this could be something like 0.05-0.1 Ohms, good for 10-50 W. So likely a 4 wire shunt with it's own heat sink.
It is not unusual to use a shunt only at 1/10 or less of the rated power to limit the heating effect. If one plans using lower currents as well one might consider a choice of 2 shunts, depending on the range.

[JeanLeMotan]

The low VDD for the DAC is likely not a good idea. In addition to the problems already mentioned it could cause trouble with the interface to the µC, if there are high voltages.  So Vdd should be more likely the µC supply with some RC or LC filtering.

I took that idea from the datasheet of DAC8571:
https://datasheet.lcsc.com/szlcsc/Texas-Instruments-TI-DAC8571IDGKR_C60535.pdf

The amplification and level shift after the DAC does not work this way. The OPs inputs are swapped.

This is embarrassing. I simulated the thing and then added the schematic in easyeda quickly before going to work.
Attached is the corrected schematic.

The OP4277 is a slightly odd and expensive choice, as it's made for relatively high impedance source. The power stages likely need to be separated a little anyway to have space for the heat sink a quad OP is also odd.

The other opamps I considered are:
TL071/2 (too noisy?)
TL051/2 (is this good enough?)
OP27
OPA227

Which one do you recommend for this? Am I missing any obvious option?

Using a parallel / series combination of 0.1 Ohms resistors is prone to add extra copper resistance and thus not really accurate. Also many small resistors close together, especially in SMD form factor have difficulties in getting the heat away. So putting 4 SMD 250 mW resistors may be more like a 500 mW resistor.

With presumably the same resistors used, it does not make that much sense to have a separate shunt for the total current. With some care in the layout, one could just combine the average voltage of the resistors at the current regulators. A separate shunt for the total would make sense, if one good quality shunt is used. The power stages could than also use simpler resistors and even simpler OPs, with one more OP to make sure the overall current is right.

Understood. Will try to find better resistors for this.
Will reconsider this stage entirely. Can you recommend an existing design for this?

[aiq25]

I also think you should use a more powerful current sense resistor and not parallel or series too many. It's also better to have power resistors in series to dissipate more heat because at least then if you have a failure you will know since the circuit will be open, versus if it's in parallel and one fails you necessarily won't know (although for this project you can have SW in place to detect and compensate).

I have done some high power current sense measurements for work and used these series of resistors from TT (high power version) and Vishay (they are not cheap but can handle tons of power): https://www.mouser.com/datasheet/2/414/LRMA-1528276.pdf or https://www.vishay.com/docs/30100/wsl.pdf

I used two in series, with value greater than 50mOhm. You do have to be careful with the PCB layout to place them right next to each other.

Not sure if you aware but resistors have a linear de-rating in power (usually above 70 degC) (as mentioned by others), so take this in account when doing power calculations.

For total current measurement you can consider Hall-Effect based current sensor, like the ACS712 (but it can add significant cost).

I know it's a popular choice to have four different FET's and op-amps but I think without fast control loops/feedback you can easily run into issues where you will not share the load between different FET's equally. If you oversize the FET's this is not a concern though. This is where the Scully approach differs, I don't know if he's implementation is the correct way but you don't see this issue with a single sense resistor concept.

[JeanLeMotan]

After spending one day trying and failing to stabilize a 4 MOSFET load, each with its own balancing opamp and an outer opamp for current control, I gave up and went back to smth simple: a single beefy MOSFET that can do more than 100W continuous: IXTH110N10L2

I also fixed the voltmeter. It was using only half the range of the ADC. Now it correctly swings using a differential output amp - so LOAD+ and LOAD- go from 0 to 3.3v in opposite phase for an input voltage of +/- 35V, with an ADC common voltage of 1.68V referenced from the voltage reference.
Hope that makes sense.

I marked on the schematic some voltages that I think are interesting.
For the current shunt I went with 4 big SMD 0.1 ohm resistors in series-parallel. They have a temperature coefficient of 50 ppm/℃ which I think it's good enough for the application. I already layed them out on the PCB with cooling in mind - so they all have big copper pours on both layers, stitched with lots of vias.

For the opamp I went with a OP4177 quad as it's cheap and seems pretty good. I need 6 of them in total (7 if I do the reverse polarity with a mosfet) so I really want quads to reduce PCB clutter.
The last step is to simulate and compensate the load opamp as the IXTH110N10L2 MOSFET has quite a big gate capacitance of several nF.

I will include a SD-card slot on the board together with a ESP32 devkit footprint so that it's all-in-one. The SD card will be used for logging data.

Schematic attached (and available here: https://easyeda.com/jeanleflambeur/electronic-load)

Questions:
Does the biasing opamp U9.3 makes sense? Its purpose is to lower the min voltage a bit to compensate for any voltage offset U9.1 might have. It takes 0 - +2.048V and outputs -102.4mV - +2.048V which is then divided to -26mV - +512mV which should give me a range of 0 to 5A for a shunt resistor of 0.1 ohm.

Does the voltmeter differential output make sense? The idea was to use the full range of the ADC which needs +/- 3.3V with a Vcm of 1.65V.

Thanks a lot!

[Kleinstein]

The circuit to generate the 2 inputs is also a little odd, there should be a simpler way with just 2 OP instead of 3.
There is a limited use for the negative half of the voltage range. The load circuit is made to work with positive voltages only.
So I guess it is OK to just skip the negative voltages and keep the circuit simple and this way more stable.

The OP for the offset makes some sense, but here may be a simpler solution:  Use an OP to invert the 2 V reference and just add some part of the inverted voltage to the divider. This version is less sensitive to the OPs quality. However the OP for the current regulation is way more important anyway, as the voltage level is smaller by something like a factor of 10.

So there are only 2 critical OPs in the circuit: the one to read back the total current and the regulator OP. The others (e.g. reference shift and voltage read back) could be lower grade ones.

To combine separate controls for several FETs and a single master regulator could work in a way that the OPs for single FETs do the fast regulation and the master from the common precision shunt only does a rather small, slow correction to the set points for the single regulators.
For the slow corrections one could get away with the already amplified signal and thus only 1 performance critical OP.
So one could have a combination like an OP27, ADA4528 or OPA209 for the shunt amplification and than RC4558, TLE2021 or similar for each MOSFET and the master corrections from after the amplification.

Another point to care about is saturation of the load - if the external voltage is too low to allow the set current to flow, the regulator with slew up the gate voltage quite high and would be slow to react if later connected.  This could be a problem if the voltage source is connected with the load already on. This could be unintentionally by a poor contact. After saturation there could be high current spike - possibly even damaging or blowing the fuse.

One way to protect against this would be to disable the load, if the voltage is too low (e.g. < 0.5 V). Alternative one could turn down the current on low voltage. This could kind of set a minimum resistance (should be higher than shunt + 2*R_on) -  so the regulation should never go into saturation.

[Micke]

Related matter 
DISTRELEC sells IXTQ42N25P - MOSFET N, 250 V 42 A 300 W TO-3P for 3.91 Euro.
https://www.distrelec.biz/en/mosfet-250-42-300-to-3p-ixys-ixtq42n25p/p/17111086?queryFromSuggest=true
Good thing is that it has specified DC SOA in the datasheet 
I am building a precision current sink 0-2A for calibration purposes with this MOSFET, chopper amp LTC1152 and 1R VISHAY VHP-4 current shunt, results from prototyping good so far, 6:th digit in current fluctuate a little 

[JeanLeMotan]

Related matter 
DISTRELEC sells IXTQ42N25P - MOSFET N, 250 V 42 A 300 W TO-3P for 3.91 Euro.
https://www.distrelec.biz/en/mosfet-250-42-300-to-3p-ixys-ixtq42n25p/p/17111086?queryFromSuggest=true
Good thing is that it has specified DC SOA in the datasheet 
I am building a precision current sink 0-2A for calibration purposes with this MOSFET, chopper amp LTC1152 and 1R VISHAY VHP-4 current shunt, results from prototyping good so far, 6:th digit in current fluctuate a little 

This is great!
Ordered 4 of them.
Thanks a lot for the hint.

[JeanLeMotan]

The circuit to generate the 2 inputs is also a little odd, there should be a simpler way with just 2 OP instead of 3.
There is a limited use for the negative half of the voltage range. The load circuit is made to work with positive voltages only.
So I guess it is OK to just skip the negative voltages and keep the circuit simple and this way more stable.

You're right. My initial use-case was to show the negative voltage in red so the user knows the load is connected in reverse. But that is not needed really.
I changed the schematic to use one op-amp plus over voltage and reverse polarity protection for the ADC with a zener.

The OP for the offset makes some sense, but here may be a simpler solution:  Use an OP to invert the 2 V reference and just add some part of the inverted voltage to the divider. This version is less sensitive to the OPs quality. However the OP for the current regulation is way more important anyway, as the voltage level is smaller by something like a factor of 10.

Good idea. Done.

Another point to care about is saturation of the load - if the external voltage is too low to allow the set current to flow, the regulator with slew up the gate voltage quite high and would be slow to react if later connected.  This could be a problem if the voltage source is connected with the load already on. This could be unintentionally by a poor contact. After saturation there could be high current spike - possibly even damaging or blowing the fuse.

One way to protect against this would be to disable the load, if the voltage is too low (e.g. < 0.5 V). Alternative one could turn down the current on low voltage. This could kind of set a minimum resistance (should be higher than shunt + 2*R_on) -  so the regulation should never go into saturation.

Makes sense. I will add this feature in software. Not sure if I can drop the current on low voltage as it's the opamp (U9.1) that increases the gate voltage due to the target voltage drop not being met. So no matter how low I will set the target voltage (so target current), the opamp will keep the gate wide open.
This might be an issue with 4-wire measurements as the voltage connection might be solid but the current one (the load) might be broken. I will add permanent sensing of load voltage as well, even when using 4-wire measurement so that I can know the load voltage at all times (hope it makes sense).


I changed the schematic and created the PCB. Tomorrow I'm ordering this.
https://easyeda.com/jeanleflambeur/electronic-load

Thanks for the hints.

[Kleinstein]

The protection against saturation and thus the gate voltage to slew up all the way is something that should react relatively fast, e.g. within a few 10 µs, depending on the speed of the OP part.
For the protection is should be the voltage at the load, not a possible 4 wire connection for an extra voltage measurement.

The limitation of the effective resistance of the load, could be some kind of clamp to make sure the set voltage is never high than something like 1/3 or 1/5 of the voltage at the load. So if the voltage is to low one should reduce the set voltage with a kind of precision "diode".

[JeanLeMotan]

I finished rev3 of the load, topic here: https://www.eevblog.com/forum/projects/jlm-electronic-load-0-30v-0-4a-1ma1ma-resolution/