I've thought of that before: you can have registers (= analog S&H) for the real and imaginary components, and the math stuff as functional blocks as usual. The registers are initialized to one value, then the computed result is repeatedly clocked in until the magnitude saturates (outside the set) or a fixed number of iterations (maybe inside the set).
The iterations need to proceed at least as slow as the settling time of the computer; it would be interesting to see what effect distortions have on the geometric shape of the result. Zoom can be accomplished in the same way as an electron microscope: reduce the raster gain and the image spans a smaller area.
The result, by the way, could be buffered into a frame buffer (8-16 bits of SRAM, sequentially addressed) for eventual display. I don't expect it will be fast enough to display live, even at 320 x 200 VGA, at least not for a useful iteration depth.
Actually, that's kind of a neat project, simply because, one could make an ISA (or even PCI) card that plugs into, anything from a PC-XT with VGA, to a Pentium 2 or 3 with ISA slots (and Windows less than XP for ease of drivers). Reason being, it's a handy graphical and control platform, and the bus is the ideal way to copy the frame buffer. Well, that's not fair, you could probably serdes and dump it via SPI / USB just as well, in which case anything modern would be able to get at it (virtual COM ports can even be opened in Java..).
Tim