Picoammeter Design

[magic]

So far I've made a sim with the T in the FB..
Aprox 10pA/V output..

600μV/rtHz output referred noise from Johnson alone, 5mVpp or more in DC-1Hz bandwidth.

Does SPICE agree?

SNR is maximized by putting all your high resistors in series for feedback, until you have a problem with input current being too large for the output voltage swing of the chip. On second thought though, the difference between 800MΩ and 500MΩ will not be huge. But with several mV output noise there is perhaps no point having so much gain...

Note that your circuit is almost equivalent to a simple TIA with 500MΩ feedback followed by a 200x gain stage. (The only improvement is, noise and offset of one opamp instead of two).

I guess the 1G in my case beeing low is a blessing in disguise, having such a convenient way trim the output.
Compare that to the hassle of trimming a high one down with an excact parallel resistor 

I would divide the output of the TIA down by a few % or whatever it takes. But then it may need to be buffered somehow from external loads.

[iMo]

With the 80% divider for 800Meg FB resistor.

PS: Could it be in my Unknown probe the 39k resistor was actually a part of such an divider, such they were changing the probe gain from outside??

[ch_scr]

Some sort of addendum, here's my schematic for a "TIA with discrete dual-P-FET input stage". As we've learned above, a bit of divider action before the feedback would be advisable to be able to trim the output. Had it running half the day on sunday and didn't observe any noticeable drift on the offset.

[magic]

That's the high effort way. The lazy way is to plug them as source followers in front of a bipolar opamp, like in iMo's mystery probe.

Is there any reason for this gain stage? OP07 noise shouldn't be a problem (the FETs are probably worse) and its DC voltage gain is good enough too, I think?

edit
As before, I wonder if drain voltage has any influence on gate leakage current; perhaps there is a particular point where Ig drops to zero?

And regarding offset, there is a difference between offset voltage of the input stage and "offset" due to input leakage current. The latter can be hidden by temporarily shorting the feedback resistor. I think I would trim for zero voltage offset (with shorted feedback) in order to minimize leakage across insulation of the Hi-Z circuitry, input connector, any external cables, etc.

[ch_scr]

That's the high effort way. The lazy way is to plug them as source followers in front of a bipolar opamp, like in iMo's mystery probe.

Is there any reason for this gain stage? OP07 noise shouldn't be a problem (the FETs are probably worse) and its DC voltage gain is good enough too, I think?

edit
As before, I wonder if drain voltage has any influence on gate leakage current; perhaps there is a particular point where Ig drops to zero?

And regarding offset, there is a difference between offset voltage of the input stage and "offset" due to input leakage current. The latter can be hidden by temporarily shorting the feedback resistor. I think I would trim for zero voltage offset (with shorted feedback) in order to minimize leakage across insulation of the Hi-Z circuitry, input connector, any external cables, etc.

I've never implemented a discrete input stage before, so I worked from the LIS LS844 Appnote. Which made it sound like there is no downside (aside from low gain stability) to the "gain arrangement" compared to the "source follower".
I'll try the "shorted feedback" zero - I suspect it might be almost the same as now, with my ill guided "shorted input, measure -in to +in" zero attempt.
Will experiment with the effect of negative supply (and thus, drain voltage) on the leakage. I could also try to make the bulk/substrate substantially more positive than the source voltage?
I've taken it apart for now anyway; to add the "3x 100pF NP0 in series" 33pF feedback capacitor, an divider to get the gain up to 1mV/pA, mechanical improvement, more thorough cleaning (soapy water, DI water bath before IPA hose down, instead of only the latter) and measurement of the 1G resistor.

[ch_scr]

Similar experience to mine. I tested several specimens of different values, it was a few years ago, but I'm fairly sure all were found to be 5~10% off, always on the low side.
(..)
What I haven't done was to re-test at 10V to check voltage coefficient.
(...)
Point 9 of the datasheet does specify "change in resistance as a function of change in voltage, no more than ±5%". So maybe it's partly responsible?

The 1G I had used in circuit measures:
10V - 891M
100V - 857M
The other 1G specimen:
10V - 921M
100V - 911M
I'll try to use the latter now.
Edit: offset was found to be 150uV with the feedback shorted, so the "misguided" method worked fine as well, just higher effort.
Edit #2: the circuit is quite sensitive to the negative supply (and thus, drain voltage on the dual fet).
Not sure to measure the input leakage with open input or shunted over e.g. 120Meg? Did both:
Measured output:
state:   open        120Meg shunted
V-
-10V     600uV       8mV
-12V     0V            2mV
-14V    -700uV     -4mV

[MegaVolt]

Analog Devices provides a very handy tool for estimating bandwidth and noise for different amplifiers. Including for transimpedance.

Graphs show all components of noise including each resistor, input currents and op amp noise, etc...

https://beta-tools.analog.com/noise/

[ch_scr]

Analog Devices provides a very handy tool for estimating bandwidth and noise for different amplifiers. Including for transimpedance.

Graphs show all components of noise including each resistor, input currents and op amp noise, etc...

https://beta-tools.analog.com/noise/

They calculate 65uV RMS for a 1G / 33pF TIA. I've measured about 90uV RMS for my build, doesn't seem too shabby?

[MegaVolt]

They calculate 65uV RMS for a 1G / 33pF TIA. I've measured about 90uV RMS for my build, doesn't seem too shabby?

The output noise of the TIA can be affected by the input capacitance of the source. You can put a photodiode at the input and set its input capacitance and observe the increase in noise.

[bsw_m]

Current measurement ±1fA. Current source: NK4-1.
As a meter: ADA4530-1 integrating current-voltage converter
A bit of detail, a 10pF air capacitor is used as the feedback capacitor.
There is a differentiator at the output of the integrator. The output of the differentiator was measured with a voltmeter. No filtering/averaging was used.

[bsw_m]

Very simplified, the schematic of this I-V converter looks as shown in the attachment.

[dobsonr741]

About to build the classic one with LMC662 and 1G resistor, have 5x SO8 on cut tape. Should I bother picking the lowest input current one? In more details:

• What will be the symptoms of choosing a higher input current vs. lower in practical terms, how’s it going to limit my ability to measure leakage currents in the 10pA range?
• Given they are all from the same batch, should I expect huge variations in input current?
• Should i expect major input current variances between the two opamp on the same die, or not?

[magic]

I tried two chips and they were <0.01pA. I don't recall anyone here reporting a specimen with abnormally high leakage.

To measure yours:
- short across 1GΩ and measure offset voltage of the opamp
- remove the short, subtract previously measured offset voltage from the new output, divide by 1GΩ to calculate input bias current

[dobsonr741]

Wow, can not measure the input bias current. So low. Nulled out to <1uV offset when sorted. Short removed from 1G and it still stays within +/-2uV noise. Checked the 1G - it's really 1G. Air movements with open lid takes it 200uV away. Happy with the build.

Some of the measurements I did with it:
BAV199W leakage @5V: 100fA
CPC1025  leakage @5V: 700fA
 

[zrq]

It seems in the recent revision of the datasheet, it clearly says OPA928 can operate at Vs=36 V. To me this imply it's a very good drop-in replacement for AD549 in legacy designs. I would like to try upgrading my Keithley 238's two AD549s in the guard driver and voltage sense buffer with OPA928, powered by +-15V. This should basically eliminate the offset current.

[Alex Nikitin]

It seems in the recent revision of the datasheet, it clearly says OPA928 can operate at Vs=36 V. To me this imply it's a very good drop-in replacement for AD549 in legacy designs. I would like to try upgrading my Keithley 238's two AD549s in the guard driver and voltage sense buffer with OPA928, powered by +-15V. This should basically eliminate the offset current.

From the datasheet on OPA928 you need to pay attention to the common mode voltages as the OPA928 has a different CM range to the AD549, with +/-18V supply it doesn't like to go positive over about 3-5V from the supply midpoint, with potentially a substantial increase in the input current at higher CM voltages.

Cheers

Alex

[zrq]

Oh nice catch! Thanks!. It's mentioned in the section 6.3.6 of the OPA928 datasheet the recommended Vcm to be less than (V–) + 20V.
Thus it's unsuitable for use in the Keithley 23x for the current feedback amplifier U3, which is powered by +-15VF and may take up to +-10V of common mode voltage at full scale. However I think it should work for U2, which is powered by the power supply bootstrapped by the output voltage +-15VFB, and should nominally take very little common mode voltage.