Picoammeter Design

[Kleinstein]

The T type network adds extra resistor noise. The than lower resistor has a higher current noise. As the noise voltage of those ultra low bias OPs is not so low, there is very little advantage to have a high signal level at the output. A simple (low noise is easy at low impedance) post amplification can do the same.

There is the option to use a charge amplifier instead of a classical TIA instead. This saves the high value resistor, but needs a way to reset the capacitor, without adding too much leakage. It can work very well at the low end, but is not easy either. One variation is using a photo-diode to compensate the current. Low leakage diodes might be easier to get and more stable than a 100 GOhms resistors.

Cooling MOSFETs is often tricky, they tend so to show quite some shift in offset / operating point and usually don't work so well at really low temperatures (e.g < -50C). If you really need to cool, JFETs may be more attractive - they are said to work reasonable to low temperature. Doubling the current every 5K also works when going down.

Humidity can be a night mare with low temperatures. I have not seen cooled amplifiers for pA range currents, except when the whole system is in vacuum (e.g. in vacuum tunneling microscope).

 Often a temperature like 10 K above room temperature is a good compromise: not too much semiconductor leakage and yet reduced relative humidity (< 50%) to get low surface leakage.

[orolo]

The T type network adds extra resistor noise. The than lower resistor has a higher current noise. As the noise voltage of those ultra low bias OPs is not so low, there is very little advantage to have a high signal level at the output. A simple (low noise is easy at low impedance) post amplification can do the same.

Thanks. I didn't think about the noise problem. I also noticed that the input offset voltage of the LMC662 will cause a large voltage offset at the output with the ground referenced T network. That can be calibrated away but is a major nuisance.

The offset problem reappears if the 10G resistor is sacrified for, say, a 10MEG one (10uV/pA) and then a precision low noise amplifier x1000 is added. The offset voltage of an LMC662 is 1mV typ, so a typical 1V offset with 1.3mV/ºC drift should be expected.

[Kleinstein]

The T-network usually only makes sense for a little divider, like maybe 1:10 or less. And it has its limitations.

As a rule of thumb it is a good idea if the current measured causes a voltage drop of at least 30 mV over the feedback resistor. If the current is from a source with shot noise (like a photo-diode) at this point the shot noise (charge quantization and counting) is about as large the resistor intrinsic noise. So a 10 M resistor is good for the nA range.

[David Hess]

The Analog Devices ADA4530-1 datasheet has a great discussion about noise in transimpedance amplifiers which use very high value feedback resistors including this gem:

Shot noise calculations are appropriate only for some legacy JFET-based electrometer amplifiers, where only a single junction is connected to the amplifier input pins. Modern high impedance amplifiers have several semiconductor junctions connected to the amplifier input pins. The most significant of these junctions are the ESD diode structures. The input bias currents are equal to the sum of these diode currents. The diode currents are designed to cancel each other, but the shot noise currents are uncorrelated and cannot cancel, which, in turn, makes calculating the shot noise from the input bias current impossible.

[EmmanuelFaure]

The T type network adds extra resistor noise. The than lower resistor has a higher current noise. As the noise voltage of those ultra low bias OPs is not so low, there is very little advantage to have a high signal level at the output. A simple (low noise is easy at low impedance) post amplification can do the same.

+1

With a transimpedance amplifier, the sensivity is a function of R, and the noise (dominated by R) is a function of sqrt(R). In consequence the signal-to-noise ratio is a function of sqrt(R). The bigger R, the better.

[razberik]

Here is my implementation of PAM. It is nearly the same that Gyro did. I use 1Gohm resistor Ohmite SM108031007FE. Styrene cap is 47pF. I didnt have anything else. New from sealed bag, wasnt wash with IPA. I used gloves while manipulating with sensitive parts. Resistors, SMA PTFE connectors were washed.
Didnt have time to evaluate performance, but it seems to be possible to zero.

[Kalvin]

Not sure if this has already been posted, but here's a nice article by Bob Pease about the transimpedance amplifiers ie. current-to-voltage converters and how to optimize the performance by a few external components:

http://electronicdesign.com/analog/whats-all-transimpedance-amplifier-stuff-anyhow-part-1

[razberik]

I have played around with my PAM little bit. It is possible to zero it.
I have built source box which contain 1.5V battery, 100G resistor and PTFE BNC connector. When I connect my PAM and this source with 30cm PTFE cable, I receive about 15.8pA. The noise is about 10-20fA. Is this a real number ? I really have to admit that I wasnt 100% precious while handling sensitive parts, but I tried my best and did handle with tweezers only and wash the parts with IPA.

I have 1G and 47pF, which gave me BW = 3.37Hz.
What way Gyro found out the 330pF (0.5Hz BW) ?
How do I determine the bandwidth I need ?

[Alex Nikitin]

I have played around with my PAM little bit. It is possible to zero it.
I have built source box which contain 1.5V battery, 100G resistor and PTFE BNC connector. When I connect my PAM and this source with 30cm PTFE cable, I receive about 15.8pA. The noise is about 10-20fA. Is this a real number ? I really have to admit that I wasnt 100% precious while handling sensitive parts, but I tried my best and did handle with tweezers only and wash the parts with IPA.

I have 1G and 47pF, which gave me BW = 3.37Hz.
What way Gyro found out the 330pF (0.5Hz BW) ?
How do I determine the bandwidth I need ?

For 1G resistor and 3.37Hz BW the noise (at 25C) should be around 7.5fA RMS or roughly ~50fA p-p. I don't know how you are measuring these "10-20fA" but it is at least in a correct order of magnitude.

Cheers

Alex

[Gyro]

What way Gyro found out the 330pF (0.5Hz BW) ?
How do I determine the bandwidth I need ?

Nice recycling. 

I picked 330pF as 0.5Hz seemed a reasonable round number without going for an overly large Polystyrene cap. It was also the one in my collection with the longest length of fused polystyrene at each end of the winding. Not very scientific I know. I'm not sure if there is a 'right' bandwidth as it is application dependent. 0.5Hz obviously yields a lower noise figure, as below (from earller in the thread):

I was able to null the opamp cleanly to 0uV with the link attached. With the link removed, things obviously get rather noisier but if I take the average offset it looks less than 5uV (5fA bias current through the 1G) and even the peak readings still comes out less than 10fA. I must have got the package reasonably clean then.    Actually, leaving it a bit longer, the noise seems rather more symmetrical around zero.

Yes, a good result. With 1G resistor and ~0.5Hz bandwidth you have due to 330pF cap, the noise of the resistor is about 3uV RMS at room temperature so the equivalent current noise is about 3fA RMS. You are near the limit of detection for 1G resistor, ...

[fcb]

What a great thread.  Nice designs and great execution.

[(*steve*)]

I have what I think is a silly question.  But I'm not sure why it is silly.

One of the schematics includes something like this to generate both the split rail and the bias to the other op amp.

Imagine my first attachment here.

My concern is twofold:

1) first, the adjustment range appears to be only +/- 0.5mV even though the datasheet specifies that the LMC662 can have up to 5mV input offset. (is this somehow related to using the other op-amp in the same package, assuming they're well matched, and the same error will be present in the split ground rail, so this only nulls out the difference?)

2) won't the voltage across the 2 15R resistors vary significantly as the battery ages, causing the difference between the ground voltage and the bias voltage to change?  Or is this so dependent on other factors that you need to set up the bias frequently anyway?

My thought was to use a diode drop in place of the two 15R resistors.  This should remain relatively constant as the battery voltage changes (I'm guessing at about 0.4V at around 20 to 40uA)

Imagine the second image here

Would this result in more noise?  Would capacitors across the 300k resistors help?

(this is the first time I've uploaded images, so I'm not sure if or where they'll appear)

[Gyro]

Ah yes, that was mine I think.

Not a silly question, undoubtedly the network could probably be improved with a bit more effort.

Regarding the limited trim range, no it doesn't cover the full worst case offset range of the LMC622, however in practice it was fine for the 'typical' offset of the sample I used (I had measure its offset at the start anyway). If neccessary the component values could be tweaked for greater span but I was shooting for maximum null resolution on the pot. If I was going for volume production I would have expanded the range but would probably screen the LMC662s too, as the ones at the offset limits might possibly be less than ideal in other parameters too (input current etc.). Yes, there probably is an element of offset tracking between the two opamps in the package too (not tested).

In practice the offset nulling tracks the opamp offset pretty well as the supply voltage declines. I haven't found any need adjust offset trim. My unit is still on it's original battery and without any intermediate trimming, is still zero to within the 0.1mV digit on the 200mV range of a normal handheld DMM. There don't appear to be any noticable temperature drift effects at this resolution over normal ambient.

I did consider adding a 5V micropower LDO, which would remove pretty much any battery voltage related offset drift, but I haven't got around to it and given the stability over the last two years, probably won't bother now (maybe a lucky opamp sample).

Looking at your revised circuit....

- The diode is another active component with it's own TC, hard to know how things would track or not. Also the diode would be operating at a very low current (less than approx 30uA on a full battery), where its forward voltage and stability might not be that predictable, sample to sample (hard to say off hand).

- Yes, the input to the opamp will  be seeing a much higher source impedance ~165k vs 7.5R (once the closest decoupling capacitors are taken into account), again hard to predict what effect this might, or might not, have without prototyping it. Maybe just a little bit noisier, extra capacitors would probably be unnecessary and might add stray leakage paths. The input reistance of the LMC662 is so high that it probably wouldn't make any difference in practice.

- More components, not an issue if it's 'better'.


As I mentioned above, adding supply regulation is probably the most effective way of removing any offset trim issues, at the expense of slightly less battery life and maximum current measurement.

Why not have a play with offset compensation networks for yourself - LMC662s (or another generic cmos opamp) are really cheap and you don't need the 1G feedback resistor if you are only interested in offset compensation experiments.

[razberik]

Here it goes, another version of Gyro's picoammeter.

Difference is use of ADA4530-1 and feedback resistor is 100Gigaohm RX1M-1009FE. Compensation is 10pF styrene cap. Theoretically 159mHz bandwidth.
Unfortunately I cannot disclose more details since it is a part of some test/development jigs in my work.
I attach picture of it.

I made some noise measurement. I have a jig which generates low current using 1.5V battery + 1TeraOhm resistor. See simplified schematic (omitted capacitors and ... everything).
When I made the picoammeter I made 1hour measurement. Then I went on vacation for 1 week and when I got back I ran once again confirmation measurement.
There is a theoretical nominal current which is calculated from real battery voltage 1.58703V and 943GOhm measured resistor (claimed to be 1T).
Current is calculated with real transimpedance of 99.08Gigaohm. Output voltage is read by 34401A in fast 6 digit mode and logged into Excel.

[Gyro]

Nice implementation and stability. 

[approxime]

Hi all,

Does 8V2 mean two oppositely oriented Zener diodes? If so, is it possible to use 1N3595 instead as somebody has proposed?
Thank you!

[magic]

Looks like output overvoltage protection. It needs to be a pair of zeners connected as drawn or a biderectional transil/TVS.

[mark03]

Does 8V2 mean two oppositely oriented Zener diodes? If so, is it possible to use 1N3595 instead as somebody has proposed?

No, it just means "8.2V" i.e. a zener diode.  The reason there are two of them is that the diagram shows two.  This is a common engineering notation where the letter takes the place of the decimal point.  It is commonly used for labeling supply voltages, e.g. 3V3 means 3.3 volts, and for small resistors, e.g. 5R6 means a 5.6 ohm resistor.  I assume this originated because CAD software had trouble with punctuation in symbol names?

[Gyro]

I just put the zeners there (yes, two 8.2V ones) as a bit of output overload protection. It seemed like a good idea at the time, but they are almost certainly unnecessary in practice, as long as you aren't going to do something silly with a bench PSU or large ESD hit.

[Marco]

Shot noise calculations are appropriate only for some legacy JFET-based electrometer amplifiers, where only a single junction is connected to the amplifier input pins. Modern high impedance amplifiers have several semiconductor junctions connected to the amplifier input pins. The most significant of these junctions are the ESD diode structures. The input bias currents are equal to the sum of these diode currents. The diode currents are designed to cancel each other, but the shot noise currents are uncorrelated and cannot cancel, which, in turn, makes calculating the shot noise from the input bias current impossible.

I don't believe the bias currents are matched, it makes little sense. Lets say you reverse bias both the ESD diodes at 10 mV+offset-error to keep them both reverse biased regardless of offset error (as long as it's smaller than 10 mV). The bias currents then aren't matched, they are simply both as small as they can be with a simple follower setup.

You could think up more complex ways of balancing them by creating a femptoampere meter in your picoampere meter, but I don't think it's realistic. AFAICS it's better to just keep the bias currents as small as possible and forget about matching them.

[ckocagil]

In Gyro's design, why is the non-inverting input of the bottom op-amp connected directly to the trimpot and not the ground?

Isn't the op-amp on the top is just a buffer for the ground point?

Edit: Nevermind, I think I see it now. The op-amp establishes the middle-of-supply ground point. The trimpot allows, well, trimming the non-inverting input to compensate the Vos.

[Gyro]

Edit: Nevermind, I think I see it now. The op-amp establishes the middle-of-supply ground point. The trimpot allows, well, trimming the non-inverting input to compensate the Vos.

Yes, that's right. 

[Cerebus]

Shot noise calculations are appropriate only for some legacy JFET-based electrometer amplifiers, where only a single junction is connected to the amplifier input pins. Modern high impedance amplifiers have several semiconductor junctions connected to the amplifier input pins. The most significant of these junctions are the ESD diode structures. The input bias currents are equal to the sum of these diode currents. The diode currents are designed to cancel each other, but the shot noise currents are uncorrelated and cannot cancel, which, in turn, makes calculating the shot noise from the input bias current impossible.

I don't believe the bias currents are matched, it makes little sense. Lets say you reverse bias both the ESD diodes at 10 mV+offset-error to keep them both reverse biased regardless of offset error (as long as it's smaller than 10 mV). The bias currents then aren't matched, they are simply both as small as they can be with a simple follower setup.

You could think up more complex ways of balancing them by creating a femptoampere meter in your picoampere meter, but I don't think it's realistic. AFAICS it's better to just keep the bias currents as small as possible and forget about matching them.

You do realise that you're quoting text from an Analog data sheet (for the ADA4530-1) and misattributing it to David?

The design being discussed therein is specified for typical input bias currents of < 1 fA (max ±20 fA @ -40ºC < T_a < +85ºC) and similar input offset currents. Having managed to hit that loose easy-to meet specification, I suspect that the chip designer's statements about the various bias currents might just about be correct. 

[Marco]

Yes? So? Doesn't allow them to escape physics.

If you try to balance the currents by simply matching the bias voltages you will always arrive at the conclusion that it's best to minimize the bias voltages period ... in which case matching goes out of the window. You could increase the bias voltages to get a better relative match, but the absolute error stays the same, so it gets you nothing.

I just don't see a cheap way to create matched bias currents in the ESD diodes, so I doubt. Do you see one?

PS. AFAIK the bias current for a low leakage diode at 10 mV reverse bias is in the fA range ... so really you need to do nothing more than have a <10 mV offset buffer and create +10/-10 mV guard voltages for the ESD diodes. Once the input escapes the buffer, additional diodes can carry the ESD to the rails. No matching needed. It's the most straightforward architecture.

[magic]

Rumor has it that LMC662 bootstraps ESD diodes. Send one to Zeptobars if you want to know

That being said, some cancellation appears to occur. I vaguely remember a tendency of some LMC660 circuit to stabilize at a particular voltage when one of the input pins was left floating. I presume it was the point where all leakages cancel out.

You may try this experiment: disconnect IN+, short IN- to OUT, pre-charge IN+ to either GND, VCC or VCC/2 and see how it drifts over time. Even the magnitude of the currents (or their difference, at least) could be estimated knowing the approximate input capacitance.