PCB layout video is bringing up questions

[Faringdon]

Hi, The questions throughout this thread here concern what appears to be a ground-breaking video about PCB layout and EMC /Signal Integrity....This video smashes the "commonly held knowledge" on PCB layout...
(BTW, the video lags the audio on this video by about 15 seconds)

Connecting to earth solves noise/EMC  problems?
This video, at 5:00 onwards, explains that connecting the chassis of an equipment to earth is absolutely nothing to do with improving EMC….
PCB video (about grounding)


I have actually had systems where  a PCB was inside a class II plastic enclosure. The PCB comprised an offline, isolated  SMPS. This PCB was fed by 240VAC Earth, line and mains.
The offline SMPS had to go in its own little metal latticed cage so that the system could pass radiated emissions.
The metal cage was inside a class II plastic enclosure, so therefore there was no safety reason to connect this little metal cage to earth.

However, the secondary side of the offline SMPS PCB, comprised USB connections etc from off-board, which have an earthed ground. As such, the entire secondary side ground needed to be connected to earth.

Due to this, the metal latticed cage also needed to be connected to earth...you simply couldn’t connect it to any other node, since if you did you would be violating the isolation requirement of the offline SMPS. As you know, Earth is the only thing that you can have on primary and secondary sides of an offline isolated SMPS. This is because if there is a fault to earth, then the fuse will blow, and thus offer protection like that.

The thing is, that in an offline isolated SMPS, the input common mode chokes, are all to do with filtering the common mode "real earth" return current. The input Y capacitors also connect to "real earth", and are equally concerned with filtering the common mode "real earth" current. So in fact, you DO need to connect enclosures to "real earth" ground for the purposes of EMC improvement after all. Would you agree? If  the little metal enclosure in this situation described here, was not connected to "real earth", then the Y capacitors of the offline SMPS would also not be wanted to be connected to "real earth". Do you agree?
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Also 5:17 onwards of this video concludes that connection to earth DOES improve  the EMC situation.....

Who do we believe?
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The reference to EMC on an aeroplane (at 6:00) is “incompletely_explained” in a way, because in an aeroplane, the aeorplane’s chassis (wings, fuselage etc) can be regarded to be “real earth”. Would you agree?
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I would  tend to agree that connecting a metal chassis to earth generally has nothing to do with EMC improvement. However, supposing the equipment was in a controlled environment, such that connection to earth for safety reasons was not necessary…...then in that case, I believe that connecting the chassis to earth would give better EMC improvement, compared to eg, leaving the metal chassis floating...would you not agree?
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Also, I  am not sure if I entirely agree that connection to earth is of no benefit for EMC reasons... Once I built a crystal set radio. It did not work. I then soldered a wire to the crystal set’s circuit ground, and connected this wire to the earth in a mains socket. The crystal radio immediately worked. It would not work when this earth connection was removed.

[Faringdon]

Are power planes needed in multi layer PCBs? (not referring to high current ones)
Hi, At 23:26 of the video of the top post (also given here, below) , it states that there is never a reason to use a power plane in a PCB (for analog circuits)...



...but then in the same video he shows power planes being used, (even if only little ones sharing a layer with some signal traces).
So is it saying that power planes are OK for digital circuits?

Surely if you are supplying power to a very fast FPGA, then you need to have very close ground and power planes?,
so that you have some capacitance near the FPGA that has a high self resonant frequency,
since ceramic caps have relatively lower SRF than the capacitance of close planes?

So surely, there is a reason to have power planes?......but only for digital sections of PCBs.

[Terry Bites]

My grandmother is sucking eggs at this very moment.

[Faringdon]

Do microcontrollers always need a ground pour directly beneath them?
Thanks, Also, at 47:35  of the RHartley video , it highlights a microcontroller with a copper pour of ground right under the microcontroller. This was said to have been done because the particular micro was “noisy”. But i would infer from this that all microcontrollers therefore need such a ground pour directly beneath them? Would you agree?

[Faringdon]

Does having adjacent layer signal tracks orthogonal to each other,  reduce EMC problems?
Hi, At 51:30 to 52:26 of this  PCB video…

…. it shows a 4 layer board as follows

signal
signal
GND
signal

It says that layers 1 and 2  signals are routed at 90 degrees to each other.
It also says that layers 1 and 2 signals  suffer  no signal integrity problems. Was this because of the 90 degree routing? What would happen to signal integrity if they had not been routed at 90 degrees to each other? (better or worse signal integrity?)

Also, it says that EMC problems will result due to cross coupling between layer 1 and 2 signals. Would this EMC problem be  even worse if they had not been routed at 90 degrees to each other?

At 52:32 it says that the solution  is to route in triplets (ie, with a coplanar ground return). But wont this create "ground loops"? Also, which PCB layout packages can easy handle "routing in triplets"?. All the ones i use simply keep deleting all  the ground traces because it thinks there is already a ground trace linking those nodes?

[Faringdon]

Do you often use the top (component) layer as a GND pour layer aswell?..should you always do this?

Hi, At 55:00 to 57:32 of this  PCB video…

…. it shows a 6 layer board as follows...

signal
signal
GND
PWR
signal
signal

It says that interference between layers 1 and 2 signals made the board fail EMC. They then solve it by adding a GND pour on the top and bottom as follows

GND
signal
signal
GND
PWR
signal
signal
GND

...So there are components on at least the top layer...does it mean just pour ground round the components? Is this a standard way?

[Faringdon]

Use of  signal common mode chokes for diff signals and single ended signals that go off-board?
Hi, At  1:11:50 to  1:12:50 of this  PCB video…


It says that a microcontroller with signals going to a connector, should be as close to that connector as possible. But supposing you cant assure this?... Is it then OK to have a far distance between micro and connector, if you have say a common mode choke on the signal right next to the connector. The common mode choke being connected in signal and gnd return.

Please answer for both high speed digital signals,  (which will obviously get converted  to differential signals via a CAN module before getting to the connector), and also answer for slow ON/OFF signals which only change  state every say 10 seconds or so, and so don’t need converting to differential signals. For the slow signals, a common mode choke is still needed, and presumably just connects in the signal and the GND return, right next to the connector?

Why is it most people don’t bother using signal common mode chokes in signals just before they go off board, when their  parent micro is far from said connector?

[Faringdon]

Should you ever use a split in a GND plane?
Hi, At  1:15:30 to  1:18:40 of this  PCB video…


...It says warns against putting  splits into ground planes. I tend to agree, but have seen loads of PCBs where there were splits in GND planes, and often you see a say 10R resistor connecting between these GND planes at certain locations. Can we always say that such splitting of GND planes is a bad idea? When is it a good idea to split GND planes?

[Faringdon]

Do you ever need power planes on 4 layer boards?
Hi, At  1:44:06 of this  PCB video…


It shows 4 layer board stack ups.
They have 2 gnd layers and zero dedicated power plane layers. So is this the way forward? All this talk of power planes being needed is nonsense with 4 layer boards?….instead, you just squeeze bits of power pours around the signals on signal layers?

[Benta]

This thread is someone discussing with her/himself. Please do that at home instead.

[SiliconWizard]

You're first talking about connecting a chassis to earth, then going on with PCB layout and ground planes...
Those are two different things. Unrelated for a large part.
I haven't watched the video yet, but what is true is that there are MANY myths about earth connection. "Earth" connections on equipment are mainly done for safety reasons, not EMC.

As to the rambling about "real earth" or whatnot - what really matters is equipotentiality.

[Faringdon]

This thread is someone discussing with her/himself. Please do that at home instead.

Thanks,  i thought it was "par for the course" to not keep starting new threads sucessively if the general subject was the same? (i could be wrong here!)

You're first talking about connecting a chassis to earth, then going on with PCB layout and ground planes...

Thanks, these are all discussed in this same RHartley video, which is what i am trying to review here, as it seems to leave some open questions.

[Kasper]

An example of an analog circuit that suffered from lack of GND plane.

Years ago I was handed a motiom sensor (actually about 1000 of them) that would ocassionally detect motion when there was none.

They had a PIR motion sensor connected to an op amp and then to an MCU.  The op amp's GND was one skinny trace that was also GND for the tcvr module.  The trace was only about 0.3mm wide.  The designer said it should be fine because it's short, only about 10-20mm long. It was not fine.

Every time the tcvr transmitted, it would send about 40mA down that GND trace, making noise that would get amplified by the op amp and ocassionally trigger the MCU.  Our solution was to cut the GND between tcvr and PIR and jumper the tcvr GND to the power supply GND.

That cost a lot more time and money than it would have cost to add another layer or 2 to the PCB in the first place.

[Faringdon]

Thanks, so you solved it by basically changing to a big lower impedance GND, that sounds like a good idea.

[Faringdon]

Do you connect partial gnd and power pours with blind vias...or thru vias?
Hi, This video , at 1:44:58 to 1:47:35

offers ways (stackups) of doing a 6 layer PCB.

The first methods, shown from 1:44:58, are what most of the places where I work do it...ie 2 adjacent signal layers, and often making the traces on each of these layers at 90 degrees to each other.
..But the video says this is wrong...and offers an alternative, with partial ground and power planes, and it looks like this is indeed the best way.

I cannot imagine trying to do it this way, as the companys concerned would probably say it was unecessarily complicating things. Also, would you say that the partial pours shown  at 1:46:26 are joined with clumps of blind vias? Or could it be done with (cheaper) through vias?
At 1:49:58 of the video it shows 2 prospective 6 layer stackups with NO dedicated power planes!!!....there are just partial power pours shovelled in alongside the signals of the signal layers. I think we have seen the end of the "power plane layer"? Would you agree?
(this "partial ground/power  pour" method is really ground breaking i think)

[Faringdon]

Why dont you use common mode chokes on single ended signals that go off board?
Hi, This video , at 2:03:00 to 2:03:56

..it speaks about using common mode chokes on traces that go from IC to connector (and then to off-board  cable).

..The video says that there is no point in using a common mode choke for a single ended signal. Why is this? Even though its a single ended signal, the noise problem on the cable will be a common mode problem...so why is he saying that a common mode choke “won’t do anything” on a single ended  trace going off-board?

[T3sl4co1l]

Altium vids do not make good reference material, as you've seen.

Tim

[Faringdon]

Thanks..
Connecting an inductance in the earth wire?
Hi, At 5:15 to 5:55 of this video

..he says that an inductance is usually needed in the earth wire to a product in order to pass EMC.
But isnt this   _not_   usually the case?
The inductance used is the common mode inductance, and it is connected in line and neutral. Surely?
I mean, even clamp on ferrites are usually not connected to the earth wire, and more often around line and neutral?

[Buriedcode]

Is there really a need to post the same video TEN times?  I'm fairly certain that anyone replying would understand that you are referring to the video in the first post.  What reason does one have for making multiple replies to their own thread with the same video?

Any video, about any subject that has the sort of click baity "will SMASH commonly held beliefs!" is often just that, click bait.  And for a subject that is fairly well understood as well, although I'll freely admit I do not understand everyhthing related to EMC.

[Fronberry]

Do you connect partial gnd and power pours with blind vias...or thru vias?
Hi, This video , at 1:44:58 to 1:47:35
offers ways (stackups) of doing a 6 layer PCB.

The first methods, shown from 1:44:58, are what most of the places where I work do it...ie 2 adjacent signal layers, and often making the traces on each of these layers at 90 degrees to each other.
..But the video says this is wrong...and offers an alternative, with partial ground and power planes, and it looks like this is indeed the best way.

I cannot imagine trying to do it this way, as the companys concerned would probably say it was unecessarily complicating things. Also, would you say that the partial pours shown  at 1:46:26 are joined with clumps of blind vias? Or could it be done with (cheaper) through vias?
At 1:49:58 of the video it shows 2 prospective 6 layer stackups with NO dedicated power planes!!!....there are just partial power pours shovelled in alongside the signals of the signal layers. I think we have seen the end of the "power plane layer"? Would you agree?
(this "partial ground/power  pour" method is really ground breaking i think)

There would probably be very little reason to use any blind vias for connecting power pours, through vias are cheaper and there is no need to reduce stubs.  Only usually see blind vias/drilling on high speed signals to reduce reflections.

Partial power planes are an option, and are not particularly revolutionary, but you just need to be careful to account for the tolerance in IR drop due to the chips/etc. on your board.  The most important thing for power delivery is having sufficiently low impedance paths for current to flow.  In large, multilayer designs, power planes are still very necessary in order to provide the necessary path for high current devices like CPUs.