Low noise amplifier.

[GK]

Just a play in SPICE for now. I am using a model for the BF862 that seems to gel well with reality (IDSS at around 14mA which is typical of tested parts, ~800pV noise @ 1kHz with the 1/f corner at ~1kHz.

12 in parallel return theoretically 800pV / sqrt12 = 231pV@1kHz. For the other active components I just used parts available in the LTspice library. LT1022 is a noisy op-amp, there still could be a small benefit from a quieter device in position U3.

Q1 through Q3 is a current source load for the common source, parallel- JFET input stage. U3 is the feedback amplifier, gain is set at 60dB (1000 Av). The other LT1022 is a servo that stabilizes the operating point of the JFET common source stage - to 3VDC at the common drain.

Circuit:



Closed loop gain:



Noise performance, input-referred (noise at output divided by the 60dB closed loop gain):



Feedback amplifier loop gain and phase (70 degrees phase margin at 1MHz bandwidth):



Servo amplifier loop gain and phase (approx 60 degrees phase margin):


 
 

[Kleinstein]

The simulation models of many of the OPs do not include noise. So do a check on this.

Also the zener reference for the constant current source might not include noise. This could be a problem in the 1/f noise region.

The servo amplifier looks a little odd with the divider before the amplifier. I would have an divider after the amplifier, to reduce that noise contribution. The shown configuration might cause quite some noise at the lower frequency limit.

The 1/f noise limit of JFETs shows a lot of scattering. AFAIK this is especially true for the BF862 with different values depending on the batch / fab.

[bobaruni]

Try LT1028 for low noise OPA at U3, it is included in the STD library.
Just to repeat what KleinStein said about noise analysis and perhaps the lack of it with some models.

[Kleinstein]

The noise from U3 should not be such a big problem. This OP sees a relatively high source impedance - so an LT1028 would a an not so good choice - an Lt1007 might work though.
Anyway noise of this OP should not be that critical, as it's noise is reduces by the voltage gain from the JFETs. The LT1022 is not that bad, though there are better one available.

The more critical OP should be the one for the servo loop - at least near the lower frequency limit. Here it needs to be a JFET type.

[snarkysparky]

Just a couple of quick thoughts.

Seems like R24  2200K  would be a very noisy resistor on the gates of the FET's. 

The output opamp is fed with low impedance so it's voltage noise should be low.  LT1022 doesn't seem to be a low noise part.

The gain plots are very impressively flat.

If I may ask what is the purpose of the gate inductors. 

[bobaruni]

If I may ask what is the purpose of the gate inductors.

It's a trick used to reduce the noise induced by the resistor.

[Kleinstein]

R24 is not such a big problem. One will see the noise of this resistor only at the low frequencies near the lower band limit. At higher frequencies it is shunted by the input capacitor. At these very low frequencies the 1/f noise from the JFETs and maybe from the servo OP will be the bigger problem.

The drain side of the JFETs are not a really low impedance source. Typical value is something like 5 K ohms per JFET  (180 µS common source output impedance) - though it could be a little less due to lower voltage.

The inductor are there to stop possible high frequency (e.g. 100 MHz range) oscillations, without adding significant noise.

[MK]

try stepping the source resistance from 0-150 ohms and see what happens to the stability... try 1, 2, 5,10 steppings.

[amspire]

The circuit is not very practical unless you select a matched set of FETs. A seperate source resistor for each FET would help balance the current.

The BF862 looks like a small junction FET and you are using a lot in parallel. I am wondering if there are any single large junction FETs you could look at instead. Something like a Process 58 FET such as  2N5432/3/4. It has a 6nV noise voltage but that is at 100Hz and not the 100KHz noise spec of the BF862. It is not hard to get a low noise figure at 100KHz.

[GK]

The circuit is not very practical unless you select a matched set of FETs. A seperate source resistor for each FET would help balance the current.

The BF862 looks like a small junction FET and you are using a lot in parallel. I am wondering if there are any single large junction FETs you could look at instead. Something like a Process 58 FET such as  2N5432/3/4. It has a 6nV noise voltage but that is at 100Hz and not the 100KHz noise spec of the BF862. It is not hard to get a low noise figure at 100KHz.

Fortunately there is a fair amount of prior art here already. There isn't much that can match the BF862 in the combined terms of input C and price and the 1/f noise corner of 1kHz or less (better) has been very well established.

One (now defunct) forum I was on a member paralleled 64 of these FETs. There is little to be gained from matching devices.

[GK]

try stepping the source resistance from 0-150 ohms and see what happens to the stability... try 1, 2, 5,10 steppings.

I was wondering if someone would be astute enough to bring that up. Phase margin is reduced due to Miller effect feedback reducing the bandwidth of the input stage. Source impedances above 100 ohms begin to cause HF peaking ~ at the unity loop gain frequency (~1MHz). Several k-ohms and things begin to look scary.

This can be fixed with a BJT cascode to the FET input stage.
 

[GK]

The simulation models of many of the OPs do not include noise. So do a check on this.

Also the zener reference for the constant current source might not include noise. This could be a problem in the 1/f noise region.

The servo amplifier looks a little odd with the divider before the amplifier. I would have an divider after the amplifier, to reduce that noise contribution. The shown configuration might cause quite some noise at the lower frequency limit.

The servo amp noise isn't a consideration when there is a 2M2 resistor coupling its output. But as I said in the opening post, this was just a starter sim. I've since refined the servo to a two (dual) op amp design, which was brings another benefit not yet brought up.

[GK]

Some refinements. The added BJT cascode to the JFET stage dramatically reduces Miller effect feedback and now loop gain and phase margin of the amplifier loop is for all practical purposes independent of source impedance. Servo has been improved.

Of course this is still a simulation and and not all component selections are the most optimal. The real life prototype will have additional supply rail filtering (separate RCs for the op-amp rails and maybe a capacitance multiplier for both rail at the board input as well).

[Kleinstein]

The servo loop still has the problem with OP 1/f noise. A simple passive divider (and than unity gain in the inverter) after the OPs would reduce this. Also keep in mind noise of the ref voltages - many models don't include noise.

[MK]

The simulation models of many of the OPs do not include noise. So do a check on this.

Also the zener reference for the constant current source might not include noise. This could be a problem in the 1/f noise region.

The servo amplifier looks a little odd with the divider before the amplifier. I would have an divider after the amplifier, to reduce that noise contribution. The shown configuration might cause quite some noise at the lower frequency limit.

The servo amp noise isn't a consideration when there is a 2M2 resistor coupling its output. But as I said in the opening post, this was just a starter sim. I've since refined the servo to a two (dual) op amp design, which was brings another benefit not yet brought up.

That will help with the motorboating of the loop at the bottom end of the frequency scale

[T3sl4co1l]

Slick.

Have you been following any of Phil Hobbs's work?  This looks like something he would be quite fond of...

For anyone wondering what the heck a 150n inductor is for (aside from the explanation given above), it's approximately the inductance of a "100 ohm" ferrite bead.  The 100 ohm resistance, of course, is its resistance.

Cheap insurance to avoid unintentional grounded-gate oscillators.

Also useful for driving power MOSFETs, because the ferrite bead saturates, potentially sharpening the drive waveform, while providing considerable dampening in steady state.

Tim

[GK]

The servo loop still has the problem with OP 1/f noise. A simple passive divider (and than unity gain in the inverter) after the OPs would reduce this. Also keep in mind noise of the ref voltages - many models don't include noise.

I don't care about the models, I can do the sums. A decent FET-input op-amp for the servo won't will be less noisy than the 2M2 resistor above about 0.1 or 0.2 Hz.
When the flat white noise from the resistor is summed with the 1/f contribution from the op-amp the total increase in noise is a mouse fart in a gale at frequencies well below interest. Though a passive divider is only two additional resistors, so not a great expense.
 

[GK]

The simulation models of many of the OPs do not include noise. So do a check on this.

Also the zener reference for the constant current source might not include noise. This could be a problem in the 1/f noise region.

The servo amplifier looks a little odd with the divider before the amplifier. I would have an divider after the amplifier, to reduce that noise contribution. The shown configuration might cause quite some noise at the lower frequency limit.

The servo amp noise isn't a consideration when there is a 2M2 resistor coupling its output. But as I said in the opening post, this was just a starter sim. I've since refined the servo to a two (dual) op amp design, which was brings another benefit not yet brought up.

That will help with the motorboating of the loop at the bottom end of the frequency scale

Huh? There is no motorboating. The dominant (by a mile) frequency compensating pole for the servo loop is set by the servo integrator time constant. There is plenty of phase margin as shown in the loop gain bode plots.
 

[GK]

Slick.

Have you been following any of Phil Hobbs's work?  This looks like something he would be quite fond of...

No, never heard of him. I'd have to Google.

[MK]

The simulation models of many of the OPs do not include noise. So do a check on this.

Also the zener reference for the constant current source might not include noise. This could be a problem in the 1/f noise region.

The servo amplifier looks a little odd with the divider before the amplifier. I would have an divider after the amplifier, to reduce that noise contribution. The shown configuration might cause quite some noise at the lower frequency limit.

The servo amp noise isn't a consideration when there is a 2M2 resistor coupling its output. But as I said in the opening post, this was just a starter sim. I've since refined the servo to a two (dual) op amp design, which was brings another benefit not yet brought up.

That will help with the motorboating of the loop at the bottom end of the frequency scale

Huh? There is no motorboating. The dominant (by a mile) frequency compensating pole for the servo loop is set by the servo time constant. There is plenty of phase margin as shown in the loop gain bode plots.

at approx 15mHz (milliHz) you have 180 degree phase shift and approx 40db gain...

[GK]

The simulation models of many of the OPs do not include noise. So do a check on this.

Also the zener reference for the constant current source might not include noise. This could be a problem in the 1/f noise region.

The servo amplifier looks a little odd with the divider before the amplifier. I would have an divider after the amplifier, to reduce that noise contribution. The shown configuration might cause quite some noise at the lower frequency limit.

The servo amp noise isn't a consideration when there is a 2M2 resistor coupling its output. But as I said in the opening post, this was just a starter sim. I've since refined the servo to a two (dual) op amp design, which was brings another benefit not yet brought up.

That will help with the motorboating of the loop at the bottom end of the frequency scale

Huh? There is no motorboating. The dominant (by a mile) frequency compensating pole for the servo loop is set by the servo time constant. There is plenty of phase margin as shown in the loop gain bode plots.

at approx 15mHz (milliHz) you have 180 degree phase shift and approx 40db gain...

Those numbers don't correspond to anything I have posted so you aren't making a great deal of sense.


EDIT: I now see that you are erroneously trying to infer servo loop stability from the closed loop gain and phase plot of the amplifier.

[Kleinstein]

Noise from the servo loop will be important only near the low frequency limit, this is already due to the filtering function of the 2.2M resistor and the input capacitor. For the LT1022 used in the plan the 1/f cross over to the 2M resistor is more at 1-2 Hz. Even worse is the noise of the reference in the second version of the DC loop: it will go through to the 2 M resistor and thus likely dominate the noise below about 10 Hz.

But it really depends on the application where the lower frequency limit is. It is actually better to have the lower limit not set by the 1µF and 2.2 M, but from a later stage. So for very low frequency performance a larger input cap could help a little.

At 14 mA each the BF862 take quite some power and thus causes self heating. This can cause noise from thermal fluctuations and also slightly increased noise from the higher temperature alone. Often it is better to use a lower current per FET, especially for low frequency performance.

[GK]

2M2 generates ~190nV noise. The LT1022/LT1056 has less than 100nV noise at 1Hz (as low as the plot in the DS goes), so the crossover would be around 0.1-0.2Hz. But as I stated already, I don't intend to use this particularly noisy op-amp in the servo. The noise of the servo reference isn't necessarily worse as it's divided by 10 in the inverting stage. The LT1634 was used for the simplified sim just because it's available in LTspice, the main purpose of which was to verify the servo and amplifier loop stability. In real life just a simple R-C filter would render noise even from the crappiest Vref negligible.

I'm not running the FETs self-biased at Idss (~14mA), they are running at ~5mA each (only a 1.29:1 noise penalty [ratio^0.25]). At ~3V Vds that's only 15mW dissipation per JFET. Hardly a heating issue.

[acbern]

Should the gate resistor/coil combination not be in series rather than parallel?

[GK]

No. 150-200nH SMD inductors have been proven by others to stabilize large-multiple parallel BF862. They start to be iffy without at a count of four or beyond. The consequential series resonance still looks scary to me so I put 100R damping resistors in parallel just to be extra safe.

A whopping 100 ohms of resistance in series with each gate would worsen the overall >1 kHz noise performance by about 3dB.