I think Fig 1 of An118 (looks like an op-amp integrator) and your ltspice simulation - control gate drive slew.
While for lt1533, the datasheet has a block diagram (p6) which shows collector feedback going to the slew-control block.
So i think the slew control is done with voltage feedback from the collector/drain. Rather than the drive (base/fet).
The datasheet theory of operation (p7) indicates that it is controlling slew of *both* voltage (via collector) and current (internal currense-sense resistor under the emitters).
Control of output voltage and current slew rates is done via
two feedback loops. One loop controls the output switch
collector voltage dV/dt and the other loop controls the
emitter current dI/dt. Output slew control is achieved by
comparing the currents generated by these two slewing
events to currents created by external resistors RVSL and
OPERATIOU
RCSL. The two control loops are combined internally to
provide a smooth transition from current slew control to
voltage slew control
https://au.mouser.com/datasheet/2/609/1533f-2954000.pdf