The general idea, which was patented long ago (5030848) and won EDN Design Idea of the Year back somewhere in the 80s, is to use an ordinary CMOS Flip-Flop as a Voltage Divider, as well as the usual frequency divider. By using just two unmatched resistors, and a capacitor, with a CMOS FF it's possible to achieve ppm levels of precision almost independent of the resistor divider values. The resistors R1 and R2 are connected to the FF Q and Qbar outputs, and the capacitor C shunts the other resistors ends which are connected together, and called Vout. Neglecting FF timing and output characteristics Vout = Vdd(R2/(R1 +R2)), then on the next clock Vout = Vdd(R1/(R1 + R2)), C averages the result to precisely Vdd/2 independent of R1 or R2. The output characteristics of the FF have a small effect, as does the timing. If R1 and R2 are >> than the output Rp and Rn values (NMOS & PMOS Ron), then Rp and Rn have little effect, if the clock period is much longer than any FF timing skew (which causes duty cycle to slightly deviate from ideal 50%), then this has little effect. Interestingly a little circuit analysis shows the result with Rp and Rn included, Vout = (Vdd/2)( R1 + R2 +2Rn)/(R1 + R2 + Rn +Rp), thus is Rn= Rp then again Vout = Vdd/2.
This was simulated in LTspice and behaves as predicted by the circuit analysis.
Just for fun I built up a kludge setup on a jumper wire proto-board as shown. Found a couple 100K 1% resistors and a 1uF mylar cap. For the inverters we had some low Ron FETs that were in TO220 packages that just plug into the proto-board, any low Ron FETs should work. Since we didn't have a CMOS FF handy, and learning to program the Arduino, the Arduino was programmed to produce effective Q and Qbar FF outputs on pin 9 and 11 respectively. The Arduino delay was set to 10ms for toggling the outputs, but this isn't critical either. Since we didn't have a 5 volt reference handy, a 78L05 was used for the 5 volt source.
The kludge circuit is sitting on top a cardboard box and has been running overnight and the results from the Keysight 34465A and Agilent 34401A DVMs show a division ratio of almost a perfect 1/2. The 78L05 is wandering around some (need to get a good 5 volt reference) but stable long enough to collect some readings, now the readings are ~5.01792 and ~2.50896.
If you like to tinker around and simulate circuits and then build to see if they behave as predicted by the analysis and simulations, this is a fun circuit to play with. Since it doesn't require any precision components (almost anything will work!!), most will have parts laying around to give it a try!!
BTW we used this concept back in the late 70s and 80s in a few systems, worked beautifully then as it does now
![Smiley :)](https://www.eevblog.com/forum/Smileys/default/xsmiley.gif.pagespeed.ic.R8GFI-pF6f.png)
Best,
Edit: Someone noted the schematic was incorrect image, since I don't have the image nor paper anymore I've drawn another schematic and added it.