Author Topic: Tolerance of resistors in series and parallel  (Read 35154 times)

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Offline mikes

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Re: Tolerance of resistors in series and parallel
« Reply #25 on: April 17, 2013, 12:31:30 am »
If you read the article, you will see this is not how I defined "tolerance"; I defined it relative to the average value in a given batch of resistors.

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'I don't know what you mean by "glory",' Alice said.

Humpty Dumpty smiled contemptuously. 'Of course you don't — till I tell you. I meant "there's a nice knock-down argument for you!"'

'But "glory" doesn't mean "a nice knock-down argument",' Alice objected.

'When I use a word,' Humpty Dumpty said, in rather a scornful tone, 'it means just what I choose it to mean — neither more nor less.'
 

Offline KJDS

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Re: Tolerance of resistors in series and parallel
« Reply #26 on: April 17, 2013, 11:35:27 am »
I occaisionally use the monte carlo analysis in Microwave Office. It has the facility to tell you what the input states were for each output, so if you've got a minor spread problem you can see what's causing the issue.

Mostly Monte Carlo is used to get a design past a review stage where the reviewer isn't that competent but likes seeing pretty pictures.

As far as on chip resistors go, those of a similar value will be fairly closely matched, so an R2R ladder on a DAC can be reasonable without having to laser trim.

Offline saturation

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Re: Tolerance of resistors in series and parallel
« Reply #27 on: April 17, 2013, 12:40:51 pm »
I see this thread more as a reflection on a manufacturer's quality control, and how far off your value will be when you order 'X'.  In the end designs are better off with long term stability and tempco than an actual value, out of box.
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