Digital Octopus, opamps in general... Am I close to getting it right?

[Skimask]

Making what amounts to a digital version of a Huntron 2000.  First real attempt at diving into the world of opamps.
Circuit attached is basically the analog 'half' of everything.
Up at the top is the AC signal generator, which amounts to one of those ebay DDS modules, a voltage divider, some opamps for amplifying the signal, as well as a pickoff to monitor the output voltage via an A/D input on an MCU.  No, that particular pickoff isn't peak detecting.  Easy enough to do that in software.  Shooting for a variable pk-pk output from about 0 volts to +/- 12v.

The 2 'halves' at the bottom are two identical 'channels' for detecting voltage and current across the device under test.
Take a signal that's potentially +/-12v maximum, divide it down, shift it positive, and push it to an A/D input on an MCU.  If the signal is very small, turn up the gain at the output opamp as required.

Parts description and where they fit in to my little world...

V7 = ebay DDS, 0-X Mhz, ~1v pk-pk max
U5 = DDS output buffer
DP-R1A/DP-R1B = 100K digital pot
U6 = Buffering the digital pot output
R12/R6 = U7 set to gain of 10
U7 = signal amp, followed by TCA0372 for more current drive
U8 = Buffer for output
D5/R17/R10/D2 = follower / divider for input to A/D on MCU, keep it positive and below about 3.3v
D2 = 3.3v ZENER

R14 = Source resistance
R18 = D.U.T.

U1/U3 = channel input buffer/followers
R1/R7 & R9/R8 = input voltage dividers
C3/C1 = AC coupling cap's

DP-R2 = 100K digital pot
DP-R2/R3 = variable gain for U2
R5/DP-R3 = 100K digital pot with wiper providing offset voltage to U2

DP-R4 = 100K digital pot
DP-R4/R11 = variable gain for U4
R13/DP-R5 = 100K digital pot with wiper providing offset voltage to U4

R7/R8/D4 & R15/R16/D6 = divider for input to A/D on MCU, keeping the input positive and below about 3.3v

D8/D7 = ~12V ZENERs for a bit of protection
OpAmps are all TL084 except for the current booster opamp described above

I've built this circuit, and it works for the most part.  Opens, shorts, resistors, capacitors, inductors, all show traces that match what I'd expect, straight lines, circles, and so on.  I don't have matched cap's between the two channels, so I've got some errors there.  Resistors are all 5% or 10%, more errors there, but overall, it works as expected...
EXCEPT...
On the real Huntron, when you put a diode across the leads, the curve stays centered on the X axis (voltage), with the expected rise on the Y axis (current).
In my circuit, the curve gets shifted above (or below depending on how I hooked up the diode) the X axis, but still has the expected rise on the Y axis...just shifted up (or down) by X amount depending on the Vf of the diode.  Obviously (or maybe not) I can shift the curve back down to centered manually by adjusting the offset voltage on the output opamp (positive input of U2 or U4), but that's not the right way to go about it.

I think my problem is somewhere around the AC coupling cap's (C1 & C3)...maybe the cap's are getting "saturated", so instead of swinging between +1 and -1, they're swinging between +1.5 and -.5 (not the real numbers, just throwing something out there to see what sticks).
I'm not even remotely sure where the issue is.

OpAmps are not my game.  I think I'm just damn lucky it worked as well as it did on the first design attempt.  Probably missed one of those "traps for young players".  I've consulted the good book (e.g. The Art of Electronics), can't find anything definitive there.
Any swell answers/fixes/drinks?

[ElectroIrradiator]

Your problem is due to using AC coupling in the first place. The schematic can be simplified and modified to use DC coupling, but I am a bit short on time right now. Will post more details later, maybe tomorrow, if no-one else have done so in the meantime.

[Skimask]

The circuit in the jpg is the built-up circuit.  Past that, I'm using LTSpice to figure out what I'm trying to do.
No sense in soldering and desoldering all day to figure out the hard way that I'm doing it all wrong.

Simplified circuit - I suppose it could be simplified a bit, likely by removing a few of the opamp blocks.  There's 8 total there.  Comes out to 2 quad opamps packages.  Nice even number with no leftover parts.

On the DDS (upper) part, I'm guessing you are eluding to removing U5/U6/U7 and replacing them with a single opamp to shift and amplify the signal from the DDS.  The DDS puts out a 0 to +.6v signal.  I need to shift that so it centers on ground, and give it a variable gain up to the opamps limit, in this case is about +/-12v with +/-15v power on the opamps themselves.
My thinking is that I'm using U5 as a follower to keep from loading down the DDS chip, U6 as another follower to help drive C5 as the input to U7, which does the shifting/amplifying.  I tried playing with R6 values (non-inverting input on U7) to keep the signal centered on ground.  No dice.  Likely don't know what I'm looking for here.

On the ADC input (lower part), I would further venture to guess that you are saying the 2 opamps in each section could be combined into a single opamp.  Same basic thing here.  U1 & U3 are being used as buffers/followers to keep from loading down the D.U.T., followed by a resistor divider to knock down the voltage level to something manageable by the digital pot's, and U2 & U4 have digital pots in the feedback for a variable gain.  U2 & U4 also center the output signal on +1.65v to take advantage of the full range of the ADC input on the MCU.

I'm still playing around in LTSpice and reading thru the good book to figure out what I'm doing wrong and/or where I could optimize the circuit a bunch.  Maybe I'll have it figured out today.  Maybe next year

[Fraser]

For interest only...

I purchased a digital Huntron type component tester as a kit from ELV in Germany. It cost me almost GBP80 delivered and I have yet to build it (no time at the moment). I will see if I can find the schematic and I will attach it here for your interest. Reviews say the unit performs well with only display contrast and the absence of a backlight causing negative comment.

http://www.elv.de/controller.aspx?cid=726&detail=31618

http://www.elv.de/komponententester-kt-100-komplettbausatz.html

UPDATE:

Found the manual that includes the schematic and theory of operation. No English version is available. It may be worth considering the KT100 analogue section for your design as it is proven to work.

http://www.techome.de/manuals/58758_Komponententester_KT100_UM.pdf

Fraser

[Skimask]

I saw that awhile back, looked at the datasheets, saw the analog section, etc.
I can't figure out how that circuit keeps negative voltages from going into the ADC of the MCU.
I see the oscillator on Page 5, AC signal output going into the opamps that feed the ADC's of the MCU.  And as far as I can tell, when the test signal swings negative, so will the ADC inputs (well, depending on the components being test of course).

[alm]

The test signal is between approximately -22V and -2V. The voltage divider on the input of IC 4 A/B (eg. R36/R40) divide the signal by ~9, bringing it down to -2.5V to -0.2V. IC 4A/B are inverting, so they put it in the 0-2.5 VDC range that the ADC wants.

[Skimask]

Aha!  That's where it won't work for me.  Thanks for the kick.  Now I see where that circuit is going.
My test signal goes above AND below ground, not just below ground.

[ElectroIrradiator]

You need to look into summing amplifiers, using opamps. They come in both inverting and non-inverting varieties. Using one, you can easily add a fixed DC offset to your signal, shifting it up or down as needed. A summing amplifier can be combined with some of the other functions you want, allowing you to strip out some of the components in your first schematic. For instance a +/- 3V signal could be turned into 0-2 V in one inverting gain stage, attenuating and DC shifting the signal at the same time.

Hint: Use an injection of current from the negative supply rail, -15V, to the summing node of an inverting amplifier will shift the output up.

This would allow you to get rid of the AC coupling capacitors.

[Skimask]

Ok, I think I'm following (no pun) you...
I've figured out that I don't need to be using 3 opamps in the top section and knocked that part down to 2 opamps, one to buffer/shift/amplify, one to isolate and rectify to pick off the peaks.
I think the bottom sections will still need 2 opamps per 'channel' though....one to buffer/isolate and the other to reshift/amplify the resultant signal.  However, your thought on the summing amp made me go Google'ing, and I think I've got a better idea on how to more easily do the signal shifting that I want to do.  The only 'issue' I can for see will be finding a digital pot that can handle inputs of +/-12v across the pots themselves.
Will rework the schematics eventually and post what I can come up with (hopefully minus any 'traps for young players).

[Skimask]

Well, after a few days of thinking, reading, simulating, etc., I fail to see how I can tighten my circuit up any more than it already is.
My thinking behind each section of the circuit, following it from upper left to lower right...

(U1,U2,U3,U5,U6,U7,U8 = TL084)

U1 - buffer after the DDS.  Max output of the DDS is .6v, 0-100Khz, and is a somewhat high impedance output.
DP-R1A-DP-R1B - Digital pot for attenuation of the DDS signal
C1 - To A/C couple the signal to get equal + and - swing when... (DC coupling and using a digital pot to center the output signal around zero requires a lot of MCU intervention I'm not wanting to deal with at the moment)
DP-R2A-DP-R2D - Digital pot for offset of the A/C resultant signal.
U2 - Fixed gain inverting amp, set to give maximum +12v/-12v at output when DP-R1 divider is set to maximum output
U3 - Follower (to keep from loading down the test signal), +D1 & R3/R4/D2 - DDS output monitor, sampled by the MCU to give indication of test signal peak voltage (peak detect done in software)
U4 - "Power" follower, TCA0372, gives the test signal a bit of drive capability

U5 & U7 - Followers (again, to keep from loading down the test signal)
R5/R6 & R10/R11 - dividers, max input +/-12vpk -> ~ +/-2.1vpk
U6 & U8 - Inverting amps, using DP-R3 & DP-R5 (digital pots) to vary gain as required
DP-R4A-DP-R4D & DP-R6A-DP-R6D - Digital pot's providing + or - offset to resultant signal from U6 & U8 to keep it within 0-3.3v range of MCU's A/D input

R8/R9/D3 & R13/R14/D4 - output from U6 & U8 and protection Zener for MCU's A/D input

RS1 is the source resistance which will be connected to the circuit thru a digital switch (ADG1407)
DUT1 is the device under test terminals.
D5 & D6 will be zener diodes...in case a guy like me plugs in a charge up cap or something similar.

The 3 sets of 4 resistors (DP-R2x, DP-R4x, DP-R6x) aren't really 4 resistors, just the depiction I'm using for LTSpice.

8 opamps, 6 digital pot's, 4 caps, 4 diodes, 2 zeners, 14 resistors...

Where can I pare this circuit down further and keep the functionality that I desire?