@chickenHead:
Absolutely right. I first thought I could do the switching with the Capture/Compare peripherals (they are quite good actually) but it just doesn't make sense if one can buy a TQFP-FPGA for 30 bucks. No BGA (woohoo), and its not that expensive.
As far as the CPLD is concerned: No, you really dont need 9k cells for a integrating ADC
But, I really want the unit to be expandable, so people can add other front-ends, for example for L, C, F, and other stuff. So it's just a nice and versatile solution
For the clock, I would use a FOX +-1,5ppm inital accuracy with +-2,5ppm drift TCO. They're cheap ($3-4), SMD, small and reliable (used them on quiet a number of boards, never head problems and well within specs).
The DG444 is cool, after i looked it up, i also found the ISL43681. Do you think it'll be possible to make the reference +-2,5V (with a precision divider + inverter, aka. LT1043) so we could use this one? It's much faster, with equally low leakage and charge injection but its a low voltage type (+-5VDC supply and therefore input range max.)....and I guess we'll have to switch reasonably fast to reduce the errors in the integrator.
But back to the input buffer stuff:
I found that the LTC6240 would be a good candidate here, because of its extremely low input bias/offset current and the even lower current noise. Because the input divider/protection devices will have a very high source impedance, the current noise (together with the high source impedance) plays a role in the noise performance. The main noise contributor is indeed the input divider and not the op-amp itself (if it has a low input referred voltage noise, of course). The LTC6240 has a great performance in terms of input current and noise but has one major disadvantage. The input offset voltage drifts around 0,6-1,0µV/°C. So one has to compensate that thing, for example by chopping, which leads to a hole other set of problems.
So, I've chosen the LTC1052. Equally low current noise, but higher input bias current (30pA, times 15) but significantly lower drift, noise, and offset (drift ~10-50nV/°C). The challenge here is to balance the junctions (the datasheet is quiet nice on this one, they write a lot about it). Since we basically only need need unity gain and a gain of x10 for the lowest input range (200mV, otherwise the integration time becomes too long for small signals, in other words, the error increases), a switch will bypass the divider and I'll choose a non-inverting configuration. In the unity gain feedback path, the switch will add the needed material junction so we always stick with the same number in each configuration. It's quiet critical to keep the temperature of all parts in the buffer equal, and it would be nice if the resistor values are close to each other on all paths, so cancellation occurs for the thermal/junction noises. Later on the PCB, I'll add the possibility to solder in a air-protection cap, just to make sure that no airflow can build up thermal gradients on the resistors and introduce offset drift. By default, the switching frequency of the 1052 is 330Hz, so a first order low-pass in front of the op amp will ensure that we're not running into aliasing for low frequencies, with a ~200Hz -3db point. Afterwards, the integrator will take care of it. I'll do some drawings tomorrow for the input switch, overrange limit and the input buffer and add them to the repo ^^ (nah, these modules are so closely connected, you really can't treat them seperatly
).