Hmm .. ok I've found some better pics of GD32F103 with ARM and it really does look like it's got 128k of SRAM to copy the flash into and 20k of SRAM for the program to use.
Nuts!
I guess technically the "Flash Memory Controller" box could contain 128k of SRAM.
The DG32VF103 start up time from reset is 132 ms, and 118.8 ms to wake from 7 uA standby mode. Wake from "deep sleep" 400 uA mode is 6 us. So that's almost 15000 times longer from standby mode. And 60x lower power consumption. Only "backup registers" are retained in standby mode, CPU registers and SRAM contents are lost.
Yes, certainly specs like a Boot-From-Flash design.
There are a few of reasons to do this
* Mask sets and process are much cheaper, so for a development part, this can make sense (easier sign off from bean counters)
* It can allow a Higher MHz operation, as SRAM is faster than FLASH (but needs a lot more die area, so much larger memory could prove an issue )
The way it is spec'd, they could flip to a FLASH part in the future.
Maybe they gauge the market to see if MHz matters more ? - I see ARM family go up to 2048k Flash, which is too large for a on chip SRAM solution.