Its specification is confusing. Unless it is already planned for some application already, with defined I/O needs. But the article I linked to above, seems to say it was purpose designed for their own use.
Why only 3 (or 4) A 2 D converter pins ?
3 is such a small number. They went to all the trouble to give it a 12 bit 500KHz version, why not have more I/O pins, configurable to use it. Maybe at least 8 if not 12 or 16 ?
Because they were determined to make it for a selling price of $4, I suppose it limited their development budget, the number of pins on the device package, and whatever chip foundry requirements and/or pricing deals, applied.
(Speculation) Because the M0 core is the 'free' arm core (if I remember correctly, I know there are others, such as M3), its licencing requirements, may limit the chip features, so it doesn't compete too badly with the paid licence, better arm chips, or they would have had to pay higher licence fees, or something, maybe.
The guaranteed availability, until at least 2028, is a very big deal to some people. Because it means they can design with it, without needing to worry about the MCU disappearing, and a very expensive and time-consuming hardware change, and software rewrite.
That point alone, could allow it to be used in all sorts of manufactured items.
tl;dr
I agree, it does seem to have too few I/O pins, timers and some other stuff. Even in its lowly entry level segment.
But it still seems an interesting device, especially at that price point.
I also wonder why it is dual cored. I bet most people won't bother to use the second core. But maybe some tricky embedded applications, can benefit from a second core, to make the timing/interrupt management easier.