Here's what I'm trying to do. Taking a machx02 fpga, drive a 32x64 bit RGB led panel using embedded block RAM as the buffer memory. Use an embedded Lattice Mico 8 processor to read time info from a GPS module, and write the time/date into the EBR to display.
Generating the LED panel timing is relatively simple. And I've gotten an LM8 talking through a UART doing "hello world".
Where I'm falling down is understanding how to marry the two. What I want is to take dual port EBR, connect one port to the LM8 memory address space, and have the other port drive the LED panel timing. I can see how you can throw more memory into the processor from system builder but how do you refer to that? Does the CPU instantiation somehow get modified to "pass out" that EBR so that you can connect it to your verilog?
Basically how exactly do you extend the processor with custom peripherals and get them visible outside the processor? Either I'm not understandings how this all is supposed to work, or I haven't read the right documentation, or something. Googling for LM8 examples doesn't seem to turn up much beyond Latticce docs. Is no one else playing with stuff like this?
Scott