Resistance in a 1 bit Adder/Subtractor

[Fuldup]

Hi i was simulating a 1 bit Adder/Subtractor and i had some problems with it, the circuit should be right but i think that there is to much resistance in the circuit.
Can someone help me calculating the resistance of the circuit?

simulation link:

https://www.falstad.com/circuit/circuitjs.html?ctz=CQAgjCAMB0l3BWcMBMcUHYMGZIA4UA2ATmIxAUgoqoQFMBaMMAKACVwU8QniVPuDTPypUALFWJRpMBCwDuAkNmyElvESwDOSsYTEg03PQaoQAZgEMANlrralCQlSMVnMkFdv3FYLstVdfSgFIIM-bidRFgAnQwkQEwC1JLN4SFj42ncVNSjpMHTQ1ySUBNTi-DcXBPyMgBdlQmNgiXFgsx4waDRCBDBCMBVMMWIwPAMGGDE8UnG8BDxIMTBibDwh5CoAEzorAFdretDcxODVFtNQiK6+RLhbzUU2rvcXjRDnh5WUh-Wrr5UD4zIGrJ6JJavcSQpgYNQZZ4wsBwiGgu4NVGJAYUPxY+HgHgwSCEXBEfArDDEMQIPgQKbQfQTDYLSBjBAIbAowo7PaWQ7HRFUC6Yn6fHH8F75F4ZAb8fLYBByt4Pfi7A5HBjWOjbAmiKCwVhxfKwvI5RUFeChEGPao2hG2j7G5Hw0JSh5SyEYxXGYim8S+gr6xYIakIOGEHDODATfWMmbjShsjlch5qvlHFiNb22-J1XXQYOFMDUjZh1Yc2MclADPAEMQYPTrLYgNP813ubO53H2065-x1K2Q0XW7P2vuRDtiAE5-wj-z2l7D74zMX9CXYOW40YuxRrxIB7PbsWLldHqfcBcB8-7lIBy+3vJbu8sAAeNGwWI--RS2IMZXAr7gCSUhMJAEADOaDDEMY8SGIBzDYCBVLgGAkFjIksGsL4KAHlOnABp61w1hQeF+LhVwAOYoc0IDONwzA0foeoZHEDGRKRxF0Ra9pLFQfRqAhaj8WKvEUHconCfagl4ihgQVIooliBuICKdiPHfNi0miup-pqIpylScR-zUdwpyGTRpx+MpZnXGgZhcuM4QooZMbNPRdm0bWYpsYkK4+Up4I+Xu-mEY00nZkF875s4rKDHokDYOMqjErG8yzBgaB8LWKCLM2rYZmFQwpME-kdASDB4AyKDDPoQwKqQGz6tVuANoqGCyvGAmprybbYXe+FqEwO6cA8Zg4fiUkeZpHnRFRfh+QJRDhBNmR+A800LdxtkPENI1AiuLkGCVnHTswMbOihrmncRFVmDdHShKJVCibd3keUwuJrUChHYTtzD8F9drbWiAPVfwHwYj5Y2jYGRJDPgEbEhMOD1Zg+rFssfQhpyiwkA24TdeqxyFTRDAle9ZV0pVrUKngCpDBgYFrOjwiEFw+CUGztYKnlPUZr4HKDWCQHYhD1yC10XIS2LvjUkLdyoYEMvgHLksCarytWeDwvFk4QO+IMi30YbIDPqx42vOAiHa-i3JwKtFuQkM4l6nbkNiP+u260Lts8JVpAB2Q1XRoqRCm9AHt+KhKzQSS+hiIw9GE+mApW3cXse5ManXBrJUa8+YXSyVTiCJT+rpEQCxrU4pDRqMWc9IQzg4ZA1V03gWOMOQ3ItnzqeK0Ln1F6dJd+2YJuvTKbMi0L-gDKLkKqn3mrarqMgGqtE861vUV29cE9Oyb0SF+dAkm2p+YV3j0YI63NZLN3jfN8QrfrOsncMN3ydtifBiH9inpyqVTwA2DctZliQAwN6CAMA-BOEZrWHAqxVjtSTjyIm+9fzG2xAZa41sVJmEWH-aIAslbFzkheTBKRsFCVOibPyEsDo5z1mTcIGtcEC1Jgwmi2dOHG3AEQoC3l2EA3ZODDhAjILKVQuaXhkiAYCVHtnN8MiQIRgERlHgrRMLA08u5d03ZQi+j4l5M6R0vKTXWlyDye4eKaQcudZyj1sQEXsS6OIGw1AEQDP1N2oQ4SRBdrQdE-iaJHkUs+RQbkbwgEZgYI89pomnGiQkhwcSYkBJiZ0LwdhQkXgIcxUI0SAxJMCIZNAyQTKVMmspD4WtqlEQqXU96wspIQMqf9IUZSjE5ECIUBINlfBrUSNI4ZNkPHfG8Q+bi9tGhZRicYrJQCqo1RWB3VQd4eiqCMAlJStIJgE3QSnR6V4fGzkiabN4K5FnaUzMgcoflIESgOmvNIRzer3PEOtdp142maICihCpALyniFGRU2xdzCheQisM0crzeYYLCvgQJANYXomWTlbGVIlhoBWGBWMECqRBwIJQJSaDe4YKGeC9wnSSLTlmHkBWyKxKBR+Y82o7gQW2lpWGYaPKaXtIHIoG51y3g-WQP8kqTyKDzmuNKiKzLRw9OhGkPW1o2lqqdpAPWSrfDaryHPeVsqVHEg-FOJAhQUTXj-OEZV4pLl8X-PaRZbNwjDNdd5d1-5aVcRYg6vR-qoEiC2CwKiiyg2BpjCQ-1xT3Aeq5TcWl-0QgmpJDwfoErBqnh0XqvW0jpUSMKCwzS+rlDgkWV7Utu0-n8HzV5Qt0qGD5s0RIitorQR8vdQTBID0qV8TdRU8V-T9pJx7fSnxXUvIXJ9QO6EIQkVToEsM3xftoALGIByRCYYlj7PRhIPQThsAe0pHANmX93kFWQPW1FFSDKX3SP0IsnJEJUnZByECRJ4DjBJPWX0qwFhuWZj3fK-dhmsMBePT1TSdZgYum0hIdTYMhNYrBhy0HuxbCnje0En0wPBCXkTFeOoYHrzAnKzR4HaXgfg0CAMw6eBMKRQhx5FGXkwNgPAYOU41j1RxVOD8n64DfqPZSQY0ES6zA-MBvudq6ntOVm27gFbxXRI+BW1pJz8TzOPqbKKizXarppohCQtYm503YzlEw0cJg5VWE2aTGCJl6gZR4PxUSLEBouapm40To3ef8N5kJu53AfEC+CMo7QbVfOjRF+4NQgQ5WGrFoQesI0peGpkqgmT0timy4l2JkF8s6THgUngRXHo7Xy5a8G5WhmkydjdWrEqat6yhYIJrLwuKZN9Xk2iVRMk0lZV5HLPkct+tzCiD1vKtrBdoFa90TjAQUHmyqkIVEpuTdqM5Y8DwuKSkW3F5QMZ3gXOtMKa0UFhoucG6Vm75lTLnWIsCu1opFmDM+Yd+jNk5rDMTb9vCs1-UuJyMGjIc1VZmFVnesHM8lDz3VqYEIcR1N3GU67IorF5M63k74jHh2hrRZ4Ljy0cQLsDFW5dmZfrvZqxViw4n9tWLSwugPLoGG3OySEq1oqMrKF1e4MdGi0QgA

[Benta]

My PC ran out of RAM trying to resolve that URL.   

[Fuldup]

this is a picture of the circuit

[golden_labels]

Benta: seriously? Falstad’s simulator just passes data in the URL. The size isn’t huge enough to cause any trouble in 2024. 🤦

Fuldup: your question is not making much sense. You didn’t state what you think is wrong, exactly. Or rather why do you think it’s wrong.
Also what “resistance of the circuit” is? You didn’t even explain, how in your opinion the circuit is supposed to work.

Perhaps somebody has too much time on their hands or is going to analyze this as a kind of entertainment. But by missing such crucial information you notably decreased your chances of getting an answer, and — if any arrives — it will be delayed by the time needed to understand your intentions.

If leftmost stage was at least symmetrical or had two outputs, guessing would be easier. But the layout suggest some more convoluted logic, which requires more effort to understand.

[golden_labels]

From what I can see, your idea was this circuit:

Interactive version in Falstad’s simulator

If this is right, the logic is wrong. For any single input going high with both others being low, the output must stay the same. It does not.

Other than that, in two apparently-XOR gates there is a resistor on the bottom. That resistor and the transistor above it form a voltage follower, which basically copies one of the inputs.  I suppose the idea was, that the transistors above cut off power. But note that you still has a line bypassing them and delivering enough current for the voltage follower to work.

[golden_labels]

I found an older thread of yours, in which RFDx offered a very simple XNOR gate. Later Zero999 added amplifiers on its inputs. I assume this is where you got the idea from.

So, step by step. First, let’s look at RFDx’s version. I’ve redrawn it in a different layout to make the behavior clearer. I also used switches (to +5V and GND) as inputs, because this way the behavior is clearer:

Interactive version in Falstad’s simulator (BJT XNOR gate)

A single half of that circuit is a common emitter configuration, which under normal circumstances would act as a inverter. There are two such halves, one for each input. Now the trick: they aren’t attached to GND, but the opposite input. This way if one input is high and the other is low, it’s a normal inverter. But if the other input is also high, V_BE is 0 V and nothing happens. You may remove one of the transistors to just study the behavior of the other one.

Zero999 added amplfiers to the input. They are inverters, but in this particular case it doesn’t affect the result of the logic operation:


Thanks to this amplification the gate isn’t dependent on how much current inputs can source and sink. Since the inverters already have 10 kΩ impedance to +5 V,  the resistors at the bases of central transistors can be removed.

Now, you did two things. First you added a resistor at the emitter of one of the input amplifiers. Then took output from that resistor. Effectively this forms a voltage follower, except that it’s choked by all the circuitry above. This is not a matter of any resistances, but the signal being the value of otherwise “sewage” current. Hope that helps.

An important note, though. RFDx’s design is powered from 5 V. This voltage is crucial here, because half of the time base-emitter junctions of these transistor are reverse biased. And those have very low breakdown voltage: popular ones have maximum of -6 V.