A PNP, if you hooked that with emitter to 18V and base to GPIO then no wonder the microcontroller fried, think about the voltage drop over the base-emitter junction and what voltage would present itself a the GPIO pin.
Anyway, I've attached a LTSpice file for a simple driver circuit. It uses a pull-up resistor, R1, to drive the gate high when the GPIO pin is low. When the GPIO pin is high, it turns on the NPN transistor, which drives the gate low. R2 here is just to ensure the gate is discharged when the circuit is without power.
In the attached screenshots you can see the effect of the base resistor Rb. Note the scale of the current (blue trace) in the two screenshots. In this case the voltage source driving the "GPIO pin" in the simulation is an ideal voltage source, so can source and sink as much current as it needs to. In reality the actual GPIO pin has internal resistances etc so results won't be quite as bad as this, but it's still informative I think.
I've also attached screenshots of the rise and fall time of the gate voltage. One concern when driving MOSFETs is that these transition periods should be short, because the MOSFET dissipates a lot of power when it's in this in between state, the linear region as it's called. I'm no expert, but I think the graph shows the R1 value is low enough. I'm considering the MOSFET to be fully saturated at Vg = 8V, which is slightly conservative.
Note that the NPN driver means the load will be on when the GPIO pin is low or not driven (ie before the ESP8266 starts). If this is an issue you could add a PNP transistor between the GPIO and NPN, but hooked up to the 3.3V line instead. I can show an example if you wish.