Not sure what all mechanisms are likely to occur, but probably localized overheating (subsequent melting and destruction), general overheating (package warping and decomposition, bondwire failure, chip destruction), and electromigration (failure of interconnects or junctions due to extreme current density) are the top candidates.
General overheating is simply when the chip gets too hot, from power dissipation applied over time. This is specified by the transient impedance curves (if provided). Peak handling for short duration is always higher than continuous, because the heat capacity of the chip, lead frame, etc. are applicable. The thing has to be heated up first, for heat to conduct out of it into the next thing, and so on.
Localized heating can occur due to 2nd breakdown (part of the die gets hotter than the rest, raising current flow in that area, getting it hotter...), but this is rarely applicable for signal JFETs. Note that 2nd breakdown requires some degree of power dissipation: there has to be enough power flowing to get some temperature drop across the die, and the die is normally one of the most (thermally) conductive parts of the device (Si ~150 W/(m.K), vs. Cu ~400). Trapped inside a plastic case, signal transistors rarely suffer 2nd breakdown.
It can also be due to breakdown effects like avalanche, where a bit of breakdown frees charge carriers, which frees more, and a cascade (avalanche current filament) ensues. The effect varies with type; in BJTs, the high localized current density, plus temperature rise, can cause punch-through (Si heated so much it becomes intrinsic across the base region, and the N-type C and E regions join momentarily). In diodes, this usually happens without ill effect (myriad discharges occur across the junction, more or less all at once, or at least given a uniform fabrication process; avalanche also has a positive tempco, enforcing balance across the die). In MOSFETs, it's mostly safe, but there is a side-effect: carriers generated by avalanche can become lodged in the gate oxide, leading to eventual failure; older families (planar e.g. HEXFET and friends) had adequate distance to confer extreme robustness, but modern types are more susceptible to failure (lower peak avalanche current ratings, rarely if ever repetitive rated). JFETs I don't know about offhand, but would assume something along the diode to BJT range of effects. In short: a JFET might avalanche in a local spot, causing melting and destruction, but it might also distribute across the junction and handle it effectively.
Electromigration occurs when current density is so high that atoms are dislodged by sheer current flow. It's not a thermal effect, though it is exacerbated by temperature, and use of low-melting materials (more generally: binding energy). Currents of say ESD magnitude, applied to a tiny JFET junction, might not cause immediate destruction, but the device might only survive dozens or hundreds of strikes, not an unlimited number.
So, you have an overall operating area of, at very long time scales, the steady-state power limit applies; for intermediate scales, thermal mass applies; and even at the shortest time scales, there are limits due to breakdown, spot heating; or wear effects due to migration, where you might be able to exceed some nominal peak limit for some number of events, but not forever.
Tim