So you REALLY don't want to trigger with just one input? Can an event with 2 active inputs occur a very short time after an event with 1 active input? I mean much less than the 100 Hz rate? If it's anot a very very short time then I think you'd be better to trigger on any 1 input and then use software to filter out the ones that don't have 2+.
If you really have to detect 2+ active inputs before triggering then that's going to be very hard to do within 20ns. You'd basically have to build a layer of 50 half-adders (OR for sum, XOR for carry), that feeds a layer of 25 modified full-adders, that feeds a layer of 12, that feeds a layer of 6, that feeds a layer of 3, that feeds a layer of 2 (using the left-over output from the 25 layer), than feeds a layer of 1. Basically 7 layers of gates that have to give a yes/no output before the 20ns pulses have disappeared.
Even just from a timing point of view an FPGA will be much easier. You'd need only 3 layers of 6LUT logic (in 5 input, 2 output mode)
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