Author Topic: Help with calculating inductance of dummy load  (Read 1014 times)

0 Members and 2 Guests are viewing this topic.

Offline trilerianTopic starter

  • Regular Contributor
  • *
  • Posts: 200
  • Country: us
Help with calculating inductance of dummy load
« on: August 15, 2024, 03:53:12 pm »
For quite awhile now I have been using a dummy load made up of 5x 0r33 100W resistors (aluminum cased, wirewound).  So the total resistance of the load is 66mΩ.  The load is driven by mosfets, and the load is used to discharge batteries.  What never occurred to me when I designed this, was that the power resistors I am using are wirewound resistors, therefore they will have an inductance.  Unfortunately, I only have a cheap LCR meter and really can't get a good reading on the inductance of the resistors.  Measuring 1, is says 2µH, but measuring 5 in parallel gives the same measurement.  My understanding is inductive loads are like resistive loads in parallel, so the inductance should go down.  Based on that, I say my meter is reading correctly. 

This is the first circuit I designed using mosfets, and like I said, I took no precautions for inductive kickback.  That said, there have been no issues thus far regarding damage to the mosfets, but that doesn't necessarily mean there will not be.

I am using 4x IPP013N04NF2S (https://www.mouser.com/datasheet/2/196/Infineon_IPP013N04NF2S_DataSheet_v01_00_EN-3011955.pdf) in parallel to do the switching.  The pwm frequency is 490Hz.  The mosfets are heatsinked and I have an NTC measuring the temp at the junction of the tab and the heatsink.  The temp gets up to about 45°C, so the mosfets are not running too hot. 

I would like some help figuring out all the parameters I need to decide what I need in my future version of this.  I've done a fair amount of reading and have read that some may use TVS diodes, some just say a flyback, some say maybe just a resistor (I'm using 5 in parallel).  But regardless, I need to figure out how to calculate what I need.

Thanks
 

Offline calzap

  • Frequent Contributor
  • **
  • Posts: 487
  • Country: us
Re: Help with calculating inductance of dummy load
« Reply #1 on: August 15, 2024, 04:47:25 pm »
Wire-wound resistors typically have a very low inductance (nH range) because winding layers are in alternate directions in most of them.  Data sheets often omit any mention of inductance.  If you’re using no-name resistors, anything could happen.  If you have a digital scope, you should be able to capture any inductive kickback.  Non-wire-wound resistors do exist in the resistance and power range you’re using.  Check data sheets on possible derating of wattage based on ambient temperature.  It’s good practice to provide cooling (heat sink or fan) for power resistors if they will be operated continuously at even ½ their rated wattage.

Mike
 

Offline trilerianTopic starter

  • Regular Contributor
  • *
  • Posts: 200
  • Country: us
Re: Help with calculating inductance of dummy load
« Reply #2 on: August 15, 2024, 05:30:31 pm »
Wire-wound resistors typically have a very low inductance (nH range) because winding layers are in alternate directions in most of them.  Data sheets often omit any mention of inductance.  If you’re using no-name resistors, anything could happen.  If you have a digital scope, you should be able to capture any inductive kickback.  Non-wire-wound resistors do exist in the resistance and power range you’re using.  Check data sheets on possible derating of wattage based on ambient temperature.  It’s good practice to provide cooling (heat sink or fan) for power resistors if they will be operated continuously at even ½ their rated wattage.

Mike

I do have a digital scope that I can use.  Would I just be adding the scope probe to the side of the load connected to the drain? If that is the case then the scope does capture a spike on the rising edge of about 32V.  But I would think kickback would be on the falling edge?

As to the resistors, they are no name, but the manufacture gave me the data sheet, but no inductance value.  I tried to use a signal generator and my scope, but well, these resistors being very low resistance only give about a 50mV signal when loaded on the signal generator.   

And yes, the resistor bank is cooled with a heatsink and a couple of 60x60x25mm fans.  I have calculated for the derating of the resistors vs heat.
« Last Edit: August 15, 2024, 05:47:21 pm by trilerian »
 

Offline Kleinstein

  • Super Contributor
  • ***
  • Posts: 14670
  • Country: de
Re: Help with calculating inductance of dummy load
« Reply #3 on: August 15, 2024, 05:56:26 pm »
The low resistance is a good thing when it comes to measuring the inductance. The low voltage drop from the generator is not a problem, it is still enough to get a trigger. There are different ways to get an idea of the inductance. One would be using a low inductance resistor of the 50 Ohms directly in series. resistors of some 50 ohm usually have relatively good with the parasitic inductance and capacitance about balancing. One can than measure the phase between the voltage at just the 0.33 ohm and the 0.33 plus 50 ohms for a few relatively high frequencies (e.g. 1 MHz or 10 MHz).

The other option would be to directly measure the final circit and check for negative effects of inductance (e.g. ringing, overshoot). The rather large MOSFETs may result in slow switching, so that the inductance may not be that much of an issue.

With low cost low values wire wound resistors I would not expect alternating winding direction and more like only 1 layer.

For the LCR meter one may have to do a dummy measurement with a short with largely identical cable positions. Cables may have more inductance and it's not just the cable length, but loop area that matters - so a function of the shape, not just the length or cable type.
 

Offline trilerianTopic starter

  • Regular Contributor
  • *
  • Posts: 200
  • Country: us
Re: Help with calculating inductance of dummy load
« Reply #4 on: August 15, 2024, 09:19:36 pm »
Here are 2 pics.  Pic one a scope signal of the gate.  Pic 2 is the scope signal of one of the mosfet drain, note here the measurement is a max of 48V, but this measurement is taken right at the drain pin of the mosfet, compared to the earlier measurement taken at the drain side of the resistor bank.  So the 12" of 10AWG stranded wire is also causing a little spike, and that wire is not looped. 

So the question, is this bad, and if so, how do I fix it?

Thanks
 

Offline Xena E

  • Frequent Contributor
  • **
  • Posts: 350
  • Country: gb
Re: Help with calculating inductance of dummy load
« Reply #5 on: August 15, 2024, 10:04:31 pm »
Any spike on the falling edge of the square wave will be clamped by the mosfets 'body' diode. The inductive kick will be positive as the mosfet switches off, if they are N channel and the resistors connected to the drain(?)

That positive going spike may be a phantom, but otherwise clamp it below the mosfet Vds with a Z diode, or snubber network if it bothers you.

If you want to measure the inductance of those resistors connect them in series, (keeping them apart!), and divide the result by the quantity.
 

Offline trilerianTopic starter

  • Regular Contributor
  • *
  • Posts: 200
  • Country: us
Re: Help with calculating inductance of dummy load
« Reply #6 on: August 15, 2024, 10:43:21 pm »
The low resistance is a good thing when it comes to measuring the inductance. The low voltage drop from the generator is not a problem, it is still enough to get a trigger. There are different ways to get an idea of the inductance. One would be using a low inductance resistor of the 50 Ohms directly in series. resistors of some 50 ohm usually have relatively good with the parasitic inductance and capacitance about balancing. One can than measure the phase between the voltage at just the 0.33 ohm and the 0.33 plus 50 ohms for a few relatively high frequencies (e.g. 1 MHz or 10 MHz).

The other option would be to directly measure the final circit and check for negative effects of inductance (e.g. ringing, overshoot). The rather large MOSFETs may result in slow switching, so that the inductance may not be that much of an issue.

With low cost low values wire wound resistors I would not expect alternating winding direction and more like only 1 layer.

For the LCR meter one may have to do a dummy measurement with a short with largely identical cable positions. Cables may have more inductance and it's not just the cable length, but loop area that matters - so a function of the shape, not just the length or cable type.

I found instructions on https://daycounter.com/Articles/How-To-Measure-Inductance.phtml and used my scope and function generator to get an approximate value of 340nH. 

Any spike on the falling edge of the square wave will be clamped by the mosfets 'body' diode. The inductive kick will be positive as the mosfet switches off, if they are N channel and the resistors connected to the drain(?)

That positive going spike may be a phantom, but otherwise clamp it below the mosfet Vds with a Z diode, or snubber network if it bothers you.

If you want to measure the inductance of those resistors connect them in series, (keeping them apart!), and divide the result by the quantity.


Right, so if there is an inductive load it should happen right after the falling edge?  That would make sense to me.  But you are saying the spike on the rising edge is just noise?  It doesn't bother me if it doesn't hurt the components.  If it could, then I want to fix it.
 

Offline Xena E

  • Frequent Contributor
  • **
  • Posts: 350
  • Country: gb
Re: Help with calculating inductance of dummy load
« Reply #7 on: August 15, 2024, 11:42:12 pm »
In the conjunction that the circuit is how I assume, (have you posted a diagram of the arrangement?):

You say that you have taken the second scope picture from the drain of the Mosfets, if this is ground referenced to the source then that trace falling edge is when the Mosfet turns on... that will not cause an appreciable inductive spike.

In any case: It is when the current in the inductance is turned off the spike will be generated.

How is the circuit arranged? Can you do a sketch?
 

Offline trilerianTopic starter

  • Regular Contributor
  • *
  • Posts: 200
  • Country: us
Re: Help with calculating inductance of dummy load
« Reply #8 on: August 16, 2024, 12:06:30 am »
In the conjunction that the circuit is how I assume, (have you posted a diagram of the arrangement?):

You say that you have taken the second scope picture from the drain of the Mosfets, if this is ground referenced to the source then that trace falling edge is when the Mosfet turns on... that will not cause an appreciable inductive spike.

In any case: It is when the current in the inductance is turned off the spike will be generated.

How is the circuit arranged? Can you do a sketch?

Ok, yes, these are N channel fets.  Drain to the resistor bank and source is gnd referenced.  So the falling edge is when the mosfet turns on, I had that backwards.  Rising edge it turns off and there is that spike.  So I do need to do something about it.  For a DC motor you would add a flyback diode.  This seems like the easiest option.  How do I calculate the value I would need for that?

Thanks
 

Offline Xena E

  • Frequent Contributor
  • **
  • Posts: 350
  • Country: gb
Re: Help with calculating inductance of dummy load
« Reply #9 on: August 16, 2024, 12:29:58 am »
The current wouldn't be great, but something fast would be needed, BYV28 200 or similar 3Amp avalanche diode would be more than adequate, if you want to take that route.

 

Offline trilerianTopic starter

  • Regular Contributor
  • *
  • Posts: 200
  • Country: us
Re: Help with calculating inductance of dummy load
« Reply #10 on: August 16, 2024, 01:13:35 am »
I have a few of these on hand.  STPS2L60, the surge current is still lower than I think I would want.  But I tried one out.  There is still the spike on the rising edge so I am not sure it is doing anything.

Here is a 3d view of the board.  I drew in blue the connections to the battery and load, and I drew in black how I think the diode should be placed.  This board is going to be redesigned using a different mcu, and a gate driver.  And maybe some smb mosfets, and  I'm going to replace the big ACS sensor with a current shunt and op amp, and I'm sure some other stuff, lol. 

 

Offline Xena E

  • Frequent Contributor
  • **
  • Posts: 350
  • Country: gb
Re: Help with calculating inductance of dummy load
« Reply #11 on: August 16, 2024, 01:55:18 am »
Don't know what else to suggest, not being there(!) However, the diode is correct on the board and if it's good then should clamp any spikes.

Its good to have some protection but if the spike is still there at the same level, and the diode good, then I'd suspect it's some measuring artifact or ground phantom.

You are using a ×10 probe? Is it compensated?

Does the spike change if you move the probe leads around?

Clutching at straws here.  :-//

You can pick up some real crap if you are switching heavy currents on fast edges, and oscilloscopes are sometimes known to be liars.
 

Offline trilerianTopic starter

  • Regular Contributor
  • *
  • Posts: 200
  • Country: us
Re: Help with calculating inductance of dummy load
« Reply #12 on: August 16, 2024, 02:18:28 am »
Yes, probes are x10, yes they are compensated, or at least they are to the 1kHz 2V signal.  I just make sure the edges are square.  I can move the probe lead all over the place on any of the drain tabs or the big trace and it remains the same.  I ran a discharge for 5 minutes, same signal the entire time, with the exception of the duty cycle.  I checked the diode after the discharge and it is still good.  I zoomed in on the spike and it looks like ringing...

 

Online radiolistener

  • Super Contributor
  • ***
  • Posts: 3925
  • Country: ua
Re: Help with calculating inductance of dummy load
« Reply #13 on: August 16, 2024, 04:04:34 am »
There is no need to specify inductance of wire-wound resistors, because they are not intended to be used for RF circuits.
If you want to measure it, you can use NanoVNA which is cheap and useful tool that everybody must have.
 

Offline Xena E

  • Frequent Contributor
  • **
  • Posts: 350
  • Country: gb
Re: Help with calculating inductance of dummy load
« Reply #14 on: August 16, 2024, 05:42:42 am »
Yes, probes are x10, yes they are compensated, or at least they are to the 1kHz 2V signal.  I just make sure the edges are square.  I can move the probe lead all over the place on any of the drain tabs or the big trace and it remains the same.  I ran a discharge for 5 minutes, same signal the entire time, with the exception of the duty cycle.  I checked the diode after the discharge and it is still good.  I zoomed in on the spike and it looks like ringing...

...have you tried with the scope probe close up on the anode connection of the diode?...
 

Offline Kleinstein

  • Super Contributor
  • ***
  • Posts: 14670
  • Country: de
Re: Help with calculating inductance of dummy load
« Reply #15 on: August 16, 2024, 09:17:14 am »
340 nH looks like a reasonable value for the wire wound resistor.
The PCB also shows some kind of current sensor - this may contain some magnetic core and also add quite a bit of inductance to the circuit.

The diode as shown is just parallel to the resistor and would only help with the inductive spike from the resistor, which should be relatively small. Much of the spike is more from additional inductance, like the wiring.

The MOSFETs can usually withstand quite some voltage spikes and even clamp them if they are low energy.
 
The following users thanked this post: Xena E

Offline Xena E

  • Frequent Contributor
  • **
  • Posts: 350
  • Country: gb
Re: Help with calculating inductance of dummy load
« Reply #16 on: August 16, 2024, 10:04:10 am »
Battery connecting wires long?

Then probe around the whole high current part of the circuit...
 

Offline trilerianTopic starter

  • Regular Contributor
  • *
  • Posts: 200
  • Country: us
Re: Help with calculating inductance of dummy load
« Reply #17 on: August 16, 2024, 12:32:01 pm »
340 nH looks like a reasonable value for the wire wound resistor.
The PCB also shows some kind of current sensor - this may contain some magnetic core and also add quite a bit of inductance to the circuit.

The diode as shown is just parallel to the resistor and would only help with the inductive spike from the resistor, which should be relatively small. Much of the spike is more from additional inductance, like the wiring.

The MOSFETs can usually withstand quite some voltage spikes and even clamp them if they are low energy.

Yes, the current sensor is a magnetic hall effect sensor.  It is on the low side though, I didn't think that would make a difference.  And the inductance value is for 1 of the resistors, I have 5 in parallel so I think it should be lower for all 5.  And maybe this is a non issue, I just didn't think to check this before hand.  Like I said in my OP, I haven't had any issues with the mosfets as of yet.


 
Battery connecting wires long?

Then probe around the whole high current part of the circuit...

Yes, battery wires are long, 18" "charge leads", 10awg wire.  I will probe other high current parts of the circuit later tonight after work.

Thanks
 

Offline MrAl

  • Super Contributor
  • ***
  • Posts: 1555
Re: Help with calculating inductance of dummy load
« Reply #18 on: August 18, 2024, 05:20:26 pm »
For quite awhile now I have been using a dummy load made up of 5x 0r33 100W resistors (aluminum cased, wirewound).  So the total resistance of the load is 66mΩ.  The load is driven by mosfets, and the load is used to discharge batteries.  What never occurred to me when I designed this, was that the power resistors I am using are wirewound resistors, therefore they will have an inductance.  Unfortunately, I only have a cheap LCR meter and really can't get a good reading on the inductance of the resistors.  Measuring 1, is says 2µH, but measuring 5 in parallel gives the same measurement.  My understanding is inductive loads are like resistive loads in parallel, so the inductance should go down.  Based on that, I say my meter is reading correctly. 

This is the first circuit I designed using mosfets, and like I said, I took no precautions for inductive kickback.  That said, there have been no issues thus far regarding damage to the mosfets, but that doesn't necessarily mean there will not be.

I am using 4x IPP013N04NF2S (https://www.mouser.com/datasheet/2/196/Infineon_IPP013N04NF2S_DataSheet_v01_00_EN-3011955.pdf) in parallel to do the switching.  The pwm frequency is 490Hz.  The mosfets are heatsinked and I have an NTC measuring the temp at the junction of the tab and the heatsink.  The temp gets up to about 45°C, so the mosfets are not running too hot. 

I would like some help figuring out all the parameters I need to decide what I need in my future version of this.  I've done a fair amount of reading and have read that some may use TVS diodes, some just say a flyback, some say maybe just a resistor (I'm using 5 in parallel).  But regardless, I need to figure out how to calculate what I need.

Thanks

Hi,

You should really show the schematic when you ask questions about a circuit of any type.  For example, we have no idea how you are driving the MOSFETs.  That's an inportant bit of information that affects not only the rise and fall times but the degree of inductive kickback.

Anyway, the spike is caused by ANY inductance in series with the load, including the wiring to the MOSFETs, and that also includes the load itself.
The ringing is usually caused by the inductance in the source lead of a MOSFET, which includes the connection from the internal die to the pin of the case of the MOSFET package.  What happens is the inductance in the source lead causes the gate to rise and fall several times as the MOSFET tries to switch.  That's because the source terminal is never perfectly connected to the driver common in any MOSFET switching circuit no matter how well it is made.  However, getting the source terminal connected to the driver common is paramount to reducing this ringing effect.

The spike problem is usually best done with a snubber connected as close to the MOSFET as possible.  If you use a diode to +Vcc you have to be careful that the +Vcc line does not shoot up higher when the spike occurs.  The diode conducts when the spike appears, and the energy from the spike causes +Vcc to rise.  That means that energy has to be absorbed by something which could just be a capacitor of the right value, or a resistor across the +Vcc to ground leads close to the MOSFET along with some capacitor.  In any case, the energy dissipated by the +Vcc line must at least be equal to the spike energy or else the voltage of the +Vcc line will keep rising with each new spike generation.

I asked about the drive circuit because it is very possible to mitigate the spike and the ringing with a small modification to the driver circuit.  Spikes are caused by fast rising wave fronts, so if you slow that down a little (think step change versus ramped change) then the spike comes down.  The tradeoff is the MOSFET gets a little warmer, but in this case it's not going to be a problem as long as you don't go too far with the ramping effect.

So to summarize:
1.  Ringing is caused mostly by the connection from the source to the driver common.  The shorter the better.
2.  The spike is caused by the fast wave front.  Slowing it down means less spike and could reduce ringing also.
3.  If a diode is used to reduce spike, make sure the +Vcc line voltage does not go up when the spike occurs with a simple scope shot.  It may be hard to reduce the inductance needed to connect this diode depending on terminal distances.
4.  A snubber could be used for reducing the spike also and may work better than anything because it can be placed closer to the MOSFET drain and source terminals than any other solution.

The nice thing is, whatever you do you can just test with reduced load.  That will give you a nondestructive test.

« Last Edit: August 20, 2024, 07:54:00 am by MrAl »
 

Offline trilerianTopic starter

  • Regular Contributor
  • *
  • Posts: 200
  • Country: us
Re: Help with calculating inductance of dummy load
« Reply #19 on: August 20, 2024, 07:04:25 pm »
Ok, had a chance to do some testing.  Measuring the waveform at the battery that is being discharged still shows the spike.  However it isn't quite as large.


Hi,

You should really show the schematic when you ask questions about a circuit of any type.  For example, we have no idea how you are driving the MOSFETs.  That's an inportant bit of information that affects not only the rise and fall times but the degree of inductive kickback.

Anyway, the spike is caused by ANY inductance in series with the load, including the wiring to the MOSFETs, and that also includes the load itself.
The ringing is usually caused by the inductance in the source lead of a MOSFET, which includes the connection from the internal die to the pin of the case of the MOSFET package.  What happens is the inductance in the source lead causes the gate to rise and fall several times as the MOSFET tries to switch.  That's because the source terminal is never perfectly connected to the driver common in any MOSFET switching circuit no matter how well it is made.  However, getting the source terminal connected to the driver common is paramount to reducing this ringing effect.

The spike problem is usually best done with a snubber connected as close to the MOSFET as possible.  If you use a diode to +Vcc you have to be careful that the +Vcc line does not shoot up higher when the spike occurs.  The diode conducts when the spike appears, and the energy from the spike causes +Vcc to rise.  That means that energy has to be absorbed by something which could just be a capacitor of the right value, or a resistor across the +Vcc to ground leads close to the MOSFET along with some capacitor.  In any case, the energy dissipated by the +Vcc line must at least be equal to the spike energy or else the voltage of the +Vcc line will keep rising with each new spike generation.

I asked about the drive circuit because it is very possible to mitigate the spike and the ringing with a small modification to the driver circuit.  Spikes are caused by fast rising wave fronts, so if you slow that down a little (think step change versus ramped change) then the spike comes down.  The tradeoff is the MOSFET gets a little warmer, but in this case it's not going to be a problem as long as you don't go too far with the ramping effect.

So to summarize:
1.  Ringing is caused mostly by the connection from the source to the driver common.  The shorter the better.
2.  The spike is caused by the fast wave front.  Slowing it down means less spike and could reduce ringing also.
3.  If a diode is used to reduce spike, make sure the +Vcc line voltage does not go up when the spike occurs with a simple scope shot.  It may be hard to reduce the inductance needed to connect this diode depending on terminal distances.
4.  A snubber could be used for reducing the spike also and may work better than anything because it can be placed closer to the MOSFET drain and source terminals than any other solution.

The nice thing is, whatever you do you can just test with reduced load.  That will give you a nondestructive test.



I didn't post the schematic, you are correct.  There is virtual pic of the the board from KiCad a few posts up.  Basically though the gate is being driven by a 328P pwm pin through 200Ω gate resistors.  Resistor value was chosen to limit current on the mcu pin.  There are 4 mosfets off the one pin, each with their own gate resistor.  PWM frequency is 490Hz, I experimented with higher frequencies but the mosfets got too hot.  Some of that was due to the voltage spikes probably and some due to insufficient current to charge the gate capacitor.  Anyway, the next design will have a gate driver and not just use the mcu pin.  Speaking of, the next design I am also changing the mcu out for something faster and with more flash and RAM. 

But I did some more testing just with changing out the gate resistor to slow the transition a bit.  I change out the 200Ω resistors for 1kΩ.  This decreased the spike down to about 20V, which I assume will be fine as the DtS voltage is 40V.  Here are some scope pics with the change.  The new design will implement a snubber, and I will do some testing on that before a final design is done. 



 
The following users thanked this post: Xena E

Offline MrAl

  • Super Contributor
  • ***
  • Posts: 1555
Re: Help with calculating inductance of dummy load
« Reply #20 on: August 21, 2024, 10:38:36 am »
Ok, had a chance to do some testing.  Measuring the waveform at the battery that is being discharged still shows the spike.  However it isn't quite as large.


Hi,

You should really show the schematic when you ask questions about a circuit of any type.  For example, we have no idea how you are driving the MOSFETs.  That's an inportant bit of information that affects not only the rise and fall times but the degree of inductive kickback.

Anyway, the spike is caused by ANY inductance in series with the load, including the wiring to the MOSFETs, and that also includes the load itself.
The ringing is usually caused by the inductance in the source lead of a MOSFET, which includes the connection from the internal die to the pin of the case of the MOSFET package.  What happens is the inductance in the source lead causes the gate to rise and fall several times as the MOSFET tries to switch.  That's because the source terminal is never perfectly connected to the driver common in any MOSFET switching circuit no matter how well it is made.  However, getting the source terminal connected to the driver common is paramount to reducing this ringing effect.

The spike problem is usually best done with a snubber connected as close to the MOSFET as possible.  If you use a diode to +Vcc you have to be careful that the +Vcc line does not shoot up higher when the spike occurs.  The diode conducts when the spike appears, and the energy from the spike causes +Vcc to rise.  That means that energy has to be absorbed by something which could just be a capacitor of the right value, or a resistor across the +Vcc to ground leads close to the MOSFET along with some capacitor.  In any case, the energy dissipated by the +Vcc line must at least be equal to the spike energy or else the voltage of the +Vcc line will keep rising with each new spike generation.

I asked about the drive circuit because it is very possible to mitigate the spike and the ringing with a small modification to the driver circuit.  Spikes are caused by fast rising wave fronts, so if you slow that down a little (think step change versus ramped change) then the spike comes down.  The tradeoff is the MOSFET gets a little warmer, but in this case it's not going to be a problem as long as you don't go too far with the ramping effect.

So to summarize:
1.  Ringing is caused mostly by the connection from the source to the driver common.  The shorter the better.
2.  The spike is caused by the fast wave front.  Slowing it down means less spike and could reduce ringing also.
3.  If a diode is used to reduce spike, make sure the +Vcc line voltage does not go up when the spike occurs with a simple scope shot.  It may be hard to reduce the inductance needed to connect this diode depending on terminal distances.
4.  A snubber could be used for reducing the spike also and may work better than anything because it can be placed closer to the MOSFET drain and source terminals than any other solution.

The nice thing is, whatever you do you can just test with reduced load.  That will give you a nondestructive test.



I didn't post the schematic, you are correct.  There is virtual pic of the the board from KiCad a few posts up.  Basically though the gate is being driven by a 328P pwm pin through 200Ω gate resistors.  Resistor value was chosen to limit current on the mcu pin.  There are 4 mosfets off the one pin, each with their own gate resistor.  PWM frequency is 490Hz, I experimented with higher frequencies but the mosfets got too hot.  Some of that was due to the voltage spikes probably and some due to insufficient current to charge the gate capacitor.  Anyway, the next design will have a gate driver and not just use the mcu pin.  Speaking of, the next design I am also changing the mcu out for something faster and with more flash and RAM. 

But I did some more testing just with changing out the gate resistor to slow the transition a bit.  I change out the 200Ω resistors for 1kΩ.  This decreased the spike down to about 20V, which I assume will be fine as the DtS voltage is 40V.  Here are some scope pics with the change.  The new design will implement a snubber, and I will do some testing on that before a final design is done.

Hello again,

Oh yes, that appears to be better.  The tradeoff is MOSFET dissipation vs spike amplitude.  The frequency is so low though around 500Hz that you could probably get away with a lot.  A lot of converters are over 20kHz and even 100kHz and higher.

Once you get going you can also look into an asymmetrical drive scheme where you turn on (or off) with one value gate resistance and turn of (or on) with another gate resistance.  That means it only has to be 'slow' on one switching pulse edge.
 
The following users thanked this post: Xena E


Share me

Digg  Facebook  SlashDot  Delicious  Technorati  Twitter  Google  Yahoo
Smf