Hello there, electronics newbie here.
I've spent the last few months on and off writing VHDL code to drive a i2s sound module and a selfmade LED board from my Digilent Basys3 which has an Xilinx Artix 7 35T on it.
The FPGA dev board streams encoded media from the onboard flash, decodes it and plays it back on the audio and video modules.
Unlike the sound module, I wanted to make the LED matrix myself, I especially wanted it to be made out of discrete 5mm LEDs (Uf=3V, If=30mA).
My initial plan was to drive one of these Charliplexing Arduino LED shields, but I've ditched them since I needed something bigger.
So I've tried to come up with a design and scaled it down to 8x6 pixels (instead of the desired 32x24 pixels) to start prototyping.
Well, now that I actually have the small board soldered on a veroboard I think I need to fix up the design before moving further--but it actually works!
You can find the schematic in the attachments.
Some things to keep in mind before reading the following questions:
- The bigger version will be soldered on a PCB for which the layout doesn't exist yet
- The board receives it's power currently from a variable DC power supply set to 5V/1A
- The LEDs are being driven by multiplexing the rows. I know this will have a toll on the brighness of the bigger board, but this is a non-issue
- The different brightness is achieved by strobing the current frame and turning the transistor on if it's above a certain threshold (basically PWM)
- This is a first for me and I had little knowledge before starting this project about electronics (especially part selection and protection)
- The two shift registers for the row selection are intentional to simulate multiple shift registers concatenated on the full board
- The IRLZ44N seemed like a good choice to handle the low-side switching (and it fits on the veroboard) but is probably overkill?
- The IRF4095 was the only choice that I found because of the availability at that time, I know this is overkill. I needed a high-side switch to deliver at least 1A at 5V Drain/Source.
There are a lot of questions I couldn't find a good answer to and hopefully you guys can help me out.
I've tried driving the matrix with my FPGA from the PMOD header JB and manage to clock ShiftRowDataIn_n (which is the fastest toggling line in my case) with almost 100 kHz.
The picture is good, the registers and the selfmade logic level shifter seem to do the job just fine but if I probe the drain of that level shifter transistor I can see that it barely charges up enough to be registered appropriately for the 74HC595s.
This was after I changed up the Pull-Ups from 10k to 1k for each path. Before it barely managed to hit 25 kHz.
I saw that I can go faster than that if I reduce the resistor values even further (not only the pull ups, but also the gate resistors) but I thought I may end up frying something, needless to say it also draws a lot more power when the transistor is on and all the current through the pullup goes to ground.
In a lot of articles (wiring them up to Arduino outputs) I read that a gate resistor is used to limit the current going into a MOSFET gate to charge up the capacitance between source and gate, otherwise the transistor may end up pulling too much current and the device supplying the current can break.
Since this would be my FPGA I was very cautious about this.
Do I really need that 1k gate resistance to protect my FPGA? Don't they significantly reduce switching speeds? This question is also for the same resistors in front of the low-side/high-side transistor gates.
I feel like I'm missing a very core information here on when to use these and when not to, after all the shift registers' inputs for example are pulled directly to GND not "softly" through a resistor.
There is also a rule of thumb out there to add a 100nF ceramic cap close to every IC's VCC/GND to dampen the voltage drop when the IC switches and pulls current.
Does this only apply at certain speeds, or is this a general necessity because it only happens to occur more often at high speeds?While I'm happy that this prototype works, I've calculated that I need at least 16x the switching frequency (going from 8x6 to 32x24) or around 1.25 MHz.
I figured I can lower this number to a quarter by splitting up the data feeding onto four data lines, this doesn't solve my problem but it helps a bit.
From my understanding, this method of level shifting is not really suitable for these kinds of speeds, and apparently popular level shifters like these from SparkFun with a BSS138 are also too slow?
How to I transfer my 3.3V signals from my FPGA to the 5V shift registers with up to 1-2 MHz? The 74HC595's datasheet says it needs Vih=3.15V for 4.5V (Vih for 5V > 3.3V?) so wiring them up directly sounds like it will not work reliably.
And finally: If you have general recommendations, improvements or constructive criticism I'd love to hear them. This is my first electronics project, and I am very happy with the software and HDL side of things, but the hardware design I cannot judge. I'm sure there are a lot of things I could have done better, especially in regards to part selection so let me know!
If anything is unclear please ask, I'll try my best to answer them.