He doesn't know any, he's just hypothesising.
Most RISC-V people are not "new" but are coming from long experience with x86 and/or Arm, and all major decisions are made with very wide consultation with domain experts in both industry and academia, not by half a dozen "new" people sitting around a table in a back room with the boss constantly asking them if they are done yet.
If anything, the problem with the RISC-V ISA process is that it is too careful, too slow, for companies impatiently wanting vector/SIMD processing, hypervisor, crypto acceleration, etc etc.
Individual companies are of course making mistakes, in designing their cores, in building an SoC around the cores, etc.
The weird thing is that Arm is the opposite, pushing out all kinds of ISA extensions with almost no one picking them up. E.g. they published the SVE spec in January 2016 ... 8 1/2 years ago ... as an optional part of ARMv8.2-A but it's seen nearly zero uptake until it was forced on people in ARMv9. Virtually all commercial cores and chips are still on ARMv8.2-A ... without SVE ... and that includes things such as the RK3588 and whatever the chip is in the Pi 5 (both A76 cores). Meanwhile they published ARMv8.3-A (Oct 2016), ARMv8.4-A (Nov 2017), ARMv8.5-A (Sep 2018), ARMv8.6-A (Sep 2019), ARMv8.7-A (Sep 2020), ARMv8.8-A (sep 2021), ARMv8.9-A (Sep 2022). And starting in Sep 2019 the ARMv9-A series. As far as I know most of those have zero implementations, except by Apple (A12: ARMv8.3-A, A13: ARM8.4-A, A14/M1: ARM8.5-A, A15/A16/A17/M2/M3: ARMv8.6-A, M4 ARMv9.2-A). Qualcomm I believe was on ARMv8.2-A right up until a jump to ARMv9 with Snapdragon 7 Gen 1 and Snapdragon 8 Gen 1.