MicroBlaze - how to communicate with rest of FPGA?

[JohnnyMalaria]

Hi,

I'm on a s-t-e-e-p learning curve and a bit overwhelmed finding some answers

I have an Artix 7-based development board and have discovered the miracle of synthesizing a 32-bit processor on the FPGA. i.e., MicroBlaze. I have finally succeeded in getting a simple Hello, World! program in C to run on it and display correctly over a PuTTY connection.

How do you get a MicroBlaze application to communicate with the rest of the FPGA? e.g., if I have a DDS implemented on the FPGA, how would a MicroBlaze program interact with it? I can imagine I could use an SPI interface as I would from an external processor but I wonder if there's a more direct way.

Thanks,

John.

(I know this is old hat to many but I still can't get over that I can build a processor on an FPGA and readily compile/run C programs to run on it using free tools and a $99 board.)

[FlyingDutch]

Hello,

read about AXI Bus. Microblaze uses AXI bus for comunication with FPGA blocks and others IpCores. Se these links:

https://forums.xilinx.com/t5/Design-and-Debug-Techniques-Blog/AXI-Basics-1-Introduction-to-AXI/ba-p/1053914

https://www.xilinx.com/support/documentation/sw_manuals/xilinx13_1/platform_studio/ps_c_hdw_axi_auto_bus_connections.htm

https://www.xilinx.com/support/documentation/ip_documentation/axi_ref_guide/latest/ug1037-vivado-axi-reference-guide.pdf

https://www.xilinx.com/support/documentation/ip_documentation/ug761_axi_reference_guide.pdf

Regards

[JohnnyMalaria]

Thank you

[dtodorov]

Hey John,

I am on the same steep curve as well and so far my observations are:
-> Microblaze uc system (MCS) uses AXI bus to connect to various peripherals (there is quite a substantial free peripheral IPs you can integrate in your design).
-> You can design your own IP block, that also has an AXI interface -> to me that was a bigger chunk of learning I postponed.
-> For fast-and-dirty implementation you may check out the simple AXI GPIO blocks. Inputs/Outputs of GPIO can be internally connected to your custom RTL design. The CPU accesses the GPIO ports as simple register reads/writes. I am currently using a few instances of such AXI GPIO blocks (configuring ports as Inputs-only or Outputs-only to avoid tristate control).
`---> https://www.xilinx.com/support/documentation/ip_documentation/axi_gpio/v2_0/pg144-axi-gpio.pdf

Hope that helps.
Dimitar

[JohnnyMalaria]

Thanks, Dimitar.

I think "steep" is an understatement but the potential for what I could do is worth it.

[dtodorov]

Hi,

in such case I recommend you check out this tutorial on creating custom IP-blocks:
https://www.xilinx.com/support/documentation/sw_manuals/xilinx2019_2/ug1118-vivado-creating-packaging-custom-ip.pdf

There are also some very thorough videos on youtube on the subject.

[iMo]

Long time back I did it the easy way - there are 32bit parallel i/o ports within the microblaze configuration. I was writing into my diy blocks via those ports..

[Bassman59]

Hi,

I'm on a s-t-e-e-p learning curve and a bit overwhelmed finding some answers

I have an Artix 7-based development board and have discovered the miracle of synthesizing a 32-bit processor on the FPGA. i.e., MicroBlaze. I have finally succeeded in getting a simple Hello, World! program in C to run on it and display correctly over a PuTTY connection.

How do you get a MicroBlaze application to communicate with the rest of the FPGA? e.g., if I have a DDS implemented on the FPGA, how would a MicroBlaze program interact with it? I can imagine I could use an SPI interface as I would from an external processor but I wonder if there's a more direct way.

Thanks,

John.

(I know this is old hat to many but I still can't get over that I can build a processor on an FPGA and readily compile/run C programs to run on it using free tools and a $99 board.)

Ages ago, when I did this, I created an APB slave that rolled up everything i designed that had to talk to the processor. It seemed to be a lot easier than making a dozen slaves.