iCE40UP - how to select SPI Master config mode?

[ebastler]

I'm playing with my first iCE40-based design, for a project where the Spartan-6 (which I have used a few times before) is too much. Getting ready to transition from the Lattice evaluation board to my own custom PCB now.

The plan is to ignore the NVCM on the iCE40, and let the FPGA configure itself from an SPI flash chip upon startup -- where the flash can be reprogrammed via an external ISP programmer if needed. I have two questions in that respect:

• How do I tell the iCE40 that it should start up as the SPI Master? Is that the default when the SPI_SS pin is pulled high (or allowed to float high, as mentioned in the "iCE40 Programming & Configuration" Technote, section 9.3) -- or is there anything else to it?

• Is there any way to accidentally get the iCE40 into NVCM mode, and essentially brick it that way, by never being able to configure it differently? I understand that it takes some doing and a special programmer to program the NVCM, and that the iCE40 will ignore that memory while it is unprogrammed. But want to make sure that I don't fall into a trap here...

Thank you for your confirmation or correction of the above!

[julian1]

Yes, Fig 3.1 is what I used for guidance on the start sequence.
it just needs the slave-select pulled hi, and the ice40 will act as spi master, when pulling the bitstream.
Most schematics will also show pullups on the clk, and mosi lines .
Presumably to avoid floating gates on the flash spi, after the fpga has configured itself, and the spi pins go high-z (if not multipurposed as gpio).

I don't believe there's any way to inadvertently get it trying to read NVCM, without NVCM being specifically programmed.
An open-source pathway to program the NVCM was only recently discovered/worked out afaik.

One slightly non-obvious point, is that the on-board ice40 voltage supervisior is a bit sensitive, and likes a fast power-on.
So it is possible to power-up the device on some bench supplies, and it won't start without also performing a manual toggle of creset.
So, it's good to add something like mic803 which is a bit more robust, to give the creset a pulse.

[berke]

And if somehow you manage to activate NVCM, if you still control SS_B you'll always be able to program it in slave mode.

I don't believe there's any way to inadvertently get it trying to read NVCM, without NVCM being specifically programmed.
An open-source pathway to program the NVCM was only recently discovered/worked out afaik.

That's interesting, any details on that?

Does anyone know how the NVCM implemented internally?  Could be interesting as a back-up option.

I have a board with a design flaw, forgot some lines, so if the FPGA is not configured a heater turns on.  Normally it is configured in SPI slave mode by a microprocessor.  Having a backup config in NVCM would allow me to control that line even if the microprocessor forgets to configure the FPGA, or if the FPGA gets deconfigured due to a single event.  I use Yosys, not Diamond.

[iMo]

..and you may read/write from/to the external bitstream flash from your user space as well (provided there is enough free space in your external bitstream flash)..

[julian1]

And if somehow you manage to activate NVCM, if you still control SS_B you'll always be able to program it in slave mode.

I don't believe there's any way to inadvertently get it trying to read NVCM, without NVCM being specifically programmed.
An open-source pathway to program the NVCM was only recently discovered/worked out afaik.

That's interesting, any details on that?

Does anyone know how the NVCM implemented internally?  Could be interesting as a back-up option.
 

I haven't looked closely, but believe Tillitus recently did the reverse-engineering.

I think because their product falls the domain of secure/provable computing, where black-box/ non-transparent/ sequences become security weakpoints. Eg. for hardware TOTP generation. 

  pynvcm is a tool to program the non-volatile configuration memory (NVCM) inside the of a Tillitis' Tkey FPGA (ICE40).
  https://github.com/tillitis/pynvcm

  https://dev.tillitis.se/intro/

[SiliconWizard]

I suggest looking at the schematic of the Upduino project: https://github.com/tinyvision-ai-inc/UPduino-v3.0
Never had any problem with those, and have also used it as a basis for integrating the iCE40UP in custom boards.
You'll find details in the Lattice "iCE40 Programming and Configuration" document.