NEORV32 soft-core CPU (RISC-V) - bootloader is not working

[FlyingDutch]

Hello Forum,

I implemented soft-core SOC "NEORV32" from this GitHub repository:

https://github.com/stnolting/neorv32/tree/main

Exactly this version of NEORV32 for Xilinx (Artix7) had been chosen by me:

https://github.com/stnolting/neorv32-setups/tree/main/vivado/arty-a7-test-setup

I have opened "XilinxVivado 2019" and run the TCL script "create_project.tcl":

https://github.com/stnolting/neorv32-setups/blob/main/vivado/arty-a7-test-setup/create_project.tcl

, after that Vivado project for "NEORV32" SOC had been created.

This project was made for Xilinx Artix7 FPGA board. I changed the FPGA device and modified "user constraint" file (.xdc) to fit my FPGA board with Xilinx Spartan7 FPGA. After that I ran the synthesis and implementation of this project - all finished without errors. Then I ran generation bitstream and load FPGA configuration file to Spartan7 board - this also had been successful. After that I determined which serial port is the one connected to my soft-core NEORV SOC - it was /dev/ttyUSB0:

Code: [Select]

/dev/ttyUSB0 - Silicon_Labs_CP2102_USB_to_UART_Bridge_Controller_0001
Then I connected to serial port /dev/ttyUSB0 using "Putty" (I am working with Linux Mint OS) - see screenshot:

One can see NEORV32 bootloader information on the serial port. After that, I push "e" button and the next "u" button - the bootloader starts waiting for sending firmware (binary program for soft-CPU.

I set serial port speed to  19200 performing the command:

Code: [Select]

$ stty -F /dev/ttyUSB0 19200and then run the next command:

Code: [Select]

cat neorv32_exe.bin > /dev/ttyUSB0
After that, I had an error code: "ERR_EXE" in the Putty window (serial port).
I also tried commands:

Code: [Select]

sudo apt-get install lrzsz

sz -b neorv32_exe.bin /dev/ttyUSB0
After issuing these commands nothing happened in the Putyy window (serial waiting for firmware). I was seeking Google information related to this "ERR_EXE" error in the NEORV32 bootloader, but I didn't find useful information.

Maybe someone from the forum's users can give me a hint on how to resolve my problem

Update: in project catalog ../sw_image_gen I found script "uart_upload.sh" which purpose is loading image to the NEORV32 bootloader:


https://github.com/stnolting/neorv32/blob/main/sw/image_gen/uart_upload.sh


I tried to use it to upload a firmware:

Code: [Select]

bofh@4core:~/NEORV32/neorv32-setups-main/neorv32/sw/image_gen$ sudo sh uart_upload.sh /dev/ttyUSB0 neorv32_raw_exe.bin
Bootloader response error.
Reset processor before starting the upload.
bofh@4core:~/NEORV32/neorv32-setups-main/neorv32/sw/image_gen$
and I have this error above, or in reset state:

Code: [Select]

bofh@4core:~/NEORV32/neorv32-setups-main/neorv32/sw/image_gen$ sudo sh uart_upload.sh /dev/ttyUSB0 neorv32_exe.bin
Uploading... Upload error.
bofh@4core:~/NEORV32/neorv32-setups-main/neorv32/sw/image_gen$ In this second case, upload is starting and after a few seconds it ends with this error above.

Thanks in advance and regards

[FlyingDutch]

Hi,

I found a more detailed description of the bootloader in the file:

https://github.com/stnolting/neorv32/blob/main/docs/datasheet/software_bootloader.adoc

Maybe this will help me to solve the problem with the bootloader.
Update:
At last, I was able to determine how the bootloader binary image is incorporated in a soft-core project - this is done in the VHDL source file: ""neorv32/rtl/core/neorv32_bootloader_image.vhd". See the link to the repo:

https://github.com/stnolting/neorv32/blob/main/rtl/core/neorv32_bootloader_image.vhd

There is just a table with hex values of the binary bootloader in this source file. I wondered how the binary image of the bootloader is related to the C language source file "bootloader.c"
https://github.com/stnolting/neorv32/blob/main/sw/bootloader/bootloader.c
, and now it is clear - one has to compile this C file with a cross-compiler for RISC-V ISA and then convert binary into the format used in the VHDL file. This can be done by simple script for example in Python. I would like to alter C program of the bootloader, compile it with a cross-compiler, and then incorporate it into an FPGA soft-core project. The altered bootloader will be sending more diagnostic messages by UART in order to help determine why the bootloader is not working properly.

Best regards

[FlyingDutch]

Hi,

at the end bootloader worked properly:\

Code: [Select]

bofh@4core:~/NEORV32/neorv32-setups-main/neorv32/sw/image_gen$ sudo sh uart_upload.sh /dev/ttyUSB0 neorv32_exe.bin
Uploading... Done.
bofh@4core:~/NEORV32/neorv32-setups-main/neorv32/sw/image_gen$
I used the script delivered with the project. The cause of the bad working of the bootloader was the fact that I compiled an example binary with a bad target for the Make script. I thought that the bootloader was waiting for binary without a header and used for compilation (by RSIC-V cross-compiler) command:

Code: [Select]

make binIt turned out that the bootloader was waiting for binary with a full header, and after compilation of example binary with the command:

Code: [Select]

make exeand use of that new compiled file bootloader worked fine.

Best Regards