window_ena_out <= window_enable; // pass pixel_ena through to the output
**** this output is also dependent if the video mode is on or off
***** fix...
case (GPU_HW_Control_regs[CTRL_BYTE_BASE + 0]) // select case based on video_mode HW_reg
Both of the above changes require an input that specifies the video mode. This was specified in the HW_REGS, but we're not using those now - so what do I use in their place?
Tadaaaaaa:
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assign colour_mode_in[7:0] = bp_2_rast_cmd[7:0];
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Line #63 > NO
window_ena_out <= window_enable && (##); // pass pixel_ena through to the output
Line #67 > Put this:
window_ena_out <= 1'b0 ;
Line #78 > What? Its window_ena_out.
enable_out <= 1'b0; // set enable_out LOW
Make it:
window_ena_out <= 1'b0; // set enable_out LOW
Line #84, 102, 134, 148, 157, 166> What? Its window_ena_out.
enable_out <= 1'b1; // set enable_out HIGH
Change these lines:
if (ram_byte_in[(~x_in[2:0])] == 1'b1) begin
pixel_out[7:4] <= fg_colour[7:4];
pixel_out[3:0] <= font_color[7:4];
end
else begin
pixel_out[7:4] <= bg_colour[7:4];
pixel_out[3:0] <= font_color[3:0];
Add an assign and wire at the top of the code:
assign font_color[7:0] = cmd_in[15:8]
************* ALSO,
What's with all the case 2'h# ? 2 bits? When you are going up to over 5 or more cases?
Also, try to keep the pixels per byte in the mode numbers constant for the least significant bits.
IE:
00 = 8 pixels per byte
01 = 4 pixels per byte
10 = 2 pixels per byte
11 = 1 pixel per byte.
Use the next bit to the left for 16 bit modes on and off, also adhering to the first 2 bits pixels per byte.
Use the next bit over for video window mode ON/OFF.
We need the first 2 bottom bits to always reflect the 8pixels, 4pixels, 2 pixels, 1 pixels as 'MAGGIE' also uses these same 2 bits to know how fast to increment the memory read address. IE, 1 inc per pixel, 1 inc every 2 pixels, 1 inc every 4 pixels, 1 inc every 8 pixels. If you break this rule in the bitplane_2_raster module settings, the 2 modules will never sync pixel with memory.