Author Topic: CSI-2  (Read 1543 times)

0 Members and 1 Guest are viewing this topic.

Offline beginner43Topic starter

  • Newbie
  • Posts: 6
  • Country: tr
CSI-2
« on: April 07, 2022, 08:42:18 am »
Hello, has anyone dealt with CSI-2 before? How is byte synchronization done?
 

Offline mon2

  • Frequent Contributor
  • **
  • Posts: 472
  • Country: ca
 

Offline laugensalm

  • Regular Contributor
  • *
  • Posts: 125
  • Country: ch
Re: CSI-2
« Reply #2 on: April 10, 2022, 11:35:40 am »
Do you want to build your own core or get into MIPI development in general?
For the latter, the Lattice Crosslink (LIFMD) architecture is probably the least painful approach towards working MIPI-Hardware.
For real world behaviour, you can gather some information from their MIPIDPHYA simulation primitives.
 

Offline beginner43Topic starter

  • Newbie
  • Posts: 6
  • Country: tr
Re: CSI-2
« Reply #3 on: April 11, 2022, 08:20:30 am »
Yes, to create my own IP. I will try to do the project with Verilog. Now I am converting the parallel data into serial, but I don't know how to do byte synchronization. Line and frame synchronization are available in their own documentation. There is no problem with them. For example, let's assume that parallel data comes in the CMOS 21.04Mhz 8-bit standard. I want to convert these to pixels to bytes. But I didn't understand the clock and sync part.
 

Offline mon2

  • Frequent Contributor
  • **
  • Posts: 472
  • Country: ca
Re: CSI-2
« Reply #4 on: April 11, 2022, 09:17:21 am »
 


Share me

Digg  Facebook  SlashDot  Delicious  Technorati  Twitter  Google  Yahoo
Smf