Hi all,
I'm currently developing my second project with Efinix parts, the first project was low speed logic that really wasn't very complicated. This project involves a MIPI CSI2 RX interface, some image manipulation and output using an FT2232H. I'm finding the development of this a little tedious at the moment. All my previous experience has been with Altera and Xilinx parts with varying levels of difficulty however my tried and tested process has been to 'unit' test my blocks with behavioural simulation then synthesis and get post placement timing. If this all passes, I generally never have problems when the FPGA gets configured. I have quite a good amount of experience writing sensible Verilog now so can generally get this done within a few attempts when I break the modules down small enough. One example would be a bit and word aligner for a 16 channel LVDS image sensor interface with each channel running at 200MHz DDR.
Now, with the Efinix Trion this method is really not working for me! I'm getting some quite peculiar results and very agressive optimisation making basic FPGA level verification such as USB transfer a pain in the ass to complete. It even seems to like to ignore `(* syn_keep = "true" *)` attributes!
Even developing a very simple 32bit SPI interface to get some running status from the FPGA into my adjacent ESP32 took 3 weeks to get working! Something I expected and have done in an afternoon before.
Has anyone else had this experience with these tools / parts?