Author Topic: Attempting to identify mysterious PAL Hardware Description Language  (Read 2746 times)

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Offline inaxeonTopic starter

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I have the source code for an old PAL, developed in the early 1990s, but I have no idea what actually compiles it. According to Wikipedia the known languages are ABEL, CUPL and PALASM, but the syntax of this file does not match any of them.

Anyone seen anything like this?

Title           PM5644 LOGO TIDSCODE V8
Pattern         TIMECODE/DECODER
Revision        03
Author          SVEN NORMANN JORGENSEN
Company         PHILIPS
Date            930614
12-NC      4008 002 02011

DENNE PLD ER BEREGNET TIL AT ERSTATTE 3 ONE-SHOTS DER SIDDER
MELLEM DEN ANALOGE INTERFACE OG MIKROPROCCESSOREN PAE TEXT-
GENERATOREN
DEN BRUGES SAMTIDIG TIL ADRESSE DECODER


CLK is the clock signal.(FH I KREDSLOEBET)
denne version har rd og wd med i endualport

|PAL22V10   1:CLK,
|            2:IDATA,
|            3:A13,
|            4:A14,
|            5:A15,
|            6:WD,
|            7:RD,
|            8:-,
|            9:-,
|           10:-,
|           11:-,
|           13:-,
|           14:TICOD_MODE,
|           15:IDATADEL,
|           16:ENDUALPORT,
|           17:LD2,
|           18:LD1,
|           19:Q0,
|           20:Q1,
|           21:IDATADEL2,
|           22:TICODATA_OUT,   |TO uP TIME CODE DATA
|           23:Q2              |TO uP INT'
|
|
|REGISTERS: CLK // Q[2..0],IDATADEL,IDATADEL2
|
|ACTIVE-LOW:  ENDUALPORT,LD1,LD2,Q2,WD,RD
|
|
|P = ((IDATADEL & IDATADEL2)#(IDATADEL' & IDATADEL2'))
|
|MAP: Q[2..0] -> Q[2..0]
| { gray(n)  ->gray(n+1)    ,P  & (n/=6) & (n/=7) & TICOD_MODE
|   gray(n)  ->gray(6)      ,P  & (n==6) & TICOD_MODE
|   gray(n)  ->gray(0)      ,P  & (n==7) & TICOD_MODE
|   gray(n)  ->gray(n+1)    ,P' & (n< 4) & TICOD_MODE
|   gray(n)  ->gray(7)      ,P' & ((n==4)#(n==5)#(n==6))  & TICOD_MODE
|   gray(n)  ->gray(0)      ,P' & (n==7) & TICOD_MODE  }
|
|Q2 = TICODATA_OUT' & TICOD_MODE'
|
|TICODATA_OUT  = (TICOD_MODE  & (Q[2..0]/=gray(0)) & TICODATA_OUT )
|              # (TICOD_MODE  & (Q[2..0]/=gray(0)) & P' & (Q[2..0]==gray(1)))
|              # (TICOD_MODE  & (Q[2..0]/=gray(0)) & P' & (Q[2..0]==gray(2)))
|              # (TICOD_MODE  & (Q[2..0]/=gray(0)) & P' & (Q[2..0]==gray(3)))
|              # (TICOD_MODE' & IDATA & TICODATA_OUT  )
|              # (TICOD_MODE' & IDATA & Q2 )
|              # (TICOD_MODE' & TICODATA_OUT & Q2 )
|
|IDATADEL2      = IDATADEL
|
|IDATADEL       =IDATA
|
|LD1             = WD & A13' & A14' & A15
|
|LD2             = WD &  A13 & A14' & A15
|   
|ENDUALPORT      = A15'& (rd # wd)
|
a15 & a14 & a13     timecode   write
a15 & a14 & a13'    secund pulse
|TICOD_MODE = ( WD & A15 & A14 & A13)
|           # (TICOD_MODE & ( WD & A15 & A14 & A13')')
 

Offline PCB.Wiz

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Re: Attempting to identify mysterious PAL Hardware Description Language
« Reply #1 on: September 26, 2023, 09:02:50 am »
  8)
Hehe, that is a strange one.
You can ‘sort of’ see what it is trying to do.
Some are easier than others.
Eg LD1 LD2 look easy to recode.

gray(n) seems to be an operator, and MAP: is an usual state engine.

Q2 seems to have dual declarations?

Do you have any programmed pals ?
Some iterations with test vectors would get you there.

« Last Edit: September 26, 2023, 09:04:55 am by PCB.Wiz »
 

Offline inaxeonTopic starter

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Re: Attempting to identify mysterious PAL Hardware Description Language
« Reply #2 on: September 26, 2023, 09:10:36 am »
  8)
Hehe, that is a strange one.
You can ‘sort of’ see what it is trying to do.
Some are easier than others.
Eg LD1 LD2 look easy to recode.

gray(n) seems to be an operator, and MAP: is an usual state engine.

Q2 seems to have dual declarations?

Do you have any programmed pals ?
Some iterations with test vectors would get you there.

I do not have the programmed PAL unfortunately. But I do have a picture of one and know what its checksum is!

I reckon 'gray' is a gray code converter: https://en.wikipedia.org/wiki/Gray_code

The 'MAP' is quite tricky. Lots of syntax there. And that is the main reason why I'd like to track down the manual for whatever compiles this!
 

Online mikeselectricstuff

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Re: Attempting to identify mysterious PAL Hardware Description Language
« Reply #3 on: September 26, 2023, 09:26:49 am »
In an old 1994 PLD databook i see a reference to "Snap" software from Philips
http://www.bitsavers.org/components/philips/_dataBooks/1994_Philips_IC13_Programmable_Logic_Devices.pdf
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Online mikeselectricstuff

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Re: Attempting to identify mysterious PAL Hardware Description Language
« Reply #4 on: September 26, 2023, 09:30:49 am »
That syntax doesn't look far from my hazy memory of CUPL.
"&" is a bitwise concatenation operator, not logical AND, # is logical OR.
the only thing I'm not sure about is the " ' " suffix

Youtube channel:Taking wierd stuff apart. Very apart.
Mike's Electric Stuff: High voltage, vintage electronics etc.
Day Job: Mostly LEDs
 

Offline inaxeonTopic starter

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Re: Attempting to identify mysterious PAL Hardware Description Language
« Reply #5 on: September 26, 2023, 09:36:43 am »
In an old 1994 PLD databook i see a reference to "Snap" software from Philips
http://www.bitsavers.org/components/philips/_dataBooks/1994_Philips_IC13_Programmable_Logic_Devices.pdf

Ohh. That is interesting. Could be it. Very few mentions of it anywhere on the internet however, let alone a surviving copy of it!
 

Offline up8051

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Re: Attempting to identify mysterious PAL Hardware Description Language
« Reply #6 on: September 26, 2023, 09:47:17 am »
Probably:
 ORCAD/PLD, ORCAD/PLD386+

Example from old Orcad Tutor:
Code: [Select]
                      GRAY CODE TO BINARY CONVERTER

A Gray code to binary converter is a progressive array of exclusive-or
gates judiciously interconnectely.  Here such a converter is defined as a
numerical map, forcing the PLD compiler to work out the detailed logic
itself.  The PLD compiler achieves exactly the same logic as the classical
exclusive-or array.  See Chapter 5 of the reference guide for a discussion
of maps.

|PAL16HD8 in:G[3..0], io:B[3..0]
|
|  Map:  G[3..0] -> B[3..0]  { Gray(n) -> n }

| Vectors:
| { Display (G[3..0])d, " = ", G[3..0], " -> ", (B[3..0])d
|   Test     G[3..0]
|   End  }
« Last Edit: September 26, 2023, 10:01:39 am by up8051 »
 
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Offline inaxeonTopic starter

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Re: Attempting to identify mysterious PAL Hardware Description Language
« Reply #7 on: September 26, 2023, 10:14:47 am »
Probably:
 ORCAD/PLD, ORCAD/PLD386+

Example from old Orcad Tutor:
Code: [Select]
                      GRAY CODE TO BINARY CONVERTER

A Gray code to binary converter is a progressive array of exclusive-or
gates judiciously interconnectely.  Here such a converter is defined as a
numerical map, forcing the PLD compiler to work out the detailed logic
itself.  The PLD compiler achieves exactly the same logic as the classical
exclusive-or array.  See Chapter 5 of the reference guide for a discussion
of maps.

|PAL16HD8 in:G[3..0], io:B[3..0]
|
|  Map:  G[3..0] -> B[3..0]  { Gray(n) -> n }

| Vectors:
| { Display (G[3..0])d, " = ", G[3..0], " -> ", (B[3..0])d
|   Test     G[3..0]
|   End  }

Don't suppose you could tell us where that came from?
 

Online PA0PBZ

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Re: Attempting to identify mysterious PAL Hardware Description Language
« Reply #8 on: September 26, 2023, 10:39:29 am »
Orcad PLD seems right. Unfortunately the only manual I could find is on SCRIBD  :palm:

https://www.scribd.com/document/207983369/ORCAD-PLD

Code: [Select]
= assignment
' complement or NOT
& AND
# OR
## XOR
?? Tri-state enable
// Rising edge of the clock
\\ falling edge of the clock
« Last Edit: September 26, 2023, 10:43:06 am by PA0PBZ »
Keyboard error: Press F1 to continue.
 
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Offline up8051

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Re: Attempting to identify mysterious PAL Hardware Description Language
« Reply #9 on: September 26, 2023, 11:20:27 am »
Probably:
 ORCAD/PLD, ORCAD/PLD386+

Example from old Orcad Tutor:
Code: [Select]
                      GRAY CODE TO BINARY CONVERTER

A Gray code to binary converter is a progressive array of exclusive-or
gates judiciously interconnectely.  Here such a converter is defined as a
numerical map, forcing the PLD compiler to work out the detailed logic
itself.  The PLD compiler achieves exactly the same logic as the classical
exclusive-or array.  See Chapter 5 of the reference guide for a discussion
of maps.

|PAL16HD8 in:G[3..0], io:B[3..0]
|
|  Map:  G[3..0] -> B[3..0]  { Gray(n) -> n }

| Vectors:
| { Display (G[3..0])d, " = ", G[3..0], " -> ", (B[3..0])d
|   Test     G[3..0]
|   End  }

Don't suppose you could tell us where that came from?

I used Orcad a long long  time ago.
The file comes from an old installation disk.
Unfortunately, there is no user manual on the disk, only example files
 

Offline PCB.Wiz

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Re: Attempting to identify mysterious PAL Hardware Description Language
« Reply #10 on: September 26, 2023, 06:30:00 pm »
Probably:
 ORCAD/PLD, ORCAD/PLD386+

Example from old Orcad Tutor:
Code: [Select]
                      GRAY CODE TO BINARY CONVERTER

A Gray code to binary converter is a progressive array of exclusive-or
gates judiciously interconnectely.  Here such a converter is defined as a
numerical map, forcing the PLD compiler to work out the detailed logic
itself.  The PLD compiler achieves exactly the same logic as the classical
exclusive-or array.  See Chapter 5 of the reference guide for a discussion
of maps.

|PAL16HD8 in:G[3..0], io:B[3..0]
|
|  Map:  G[3..0] -> B[3..0]  { Gray(n) -> n }

| Vectors:
| { Display (G[3..0])d, " = ", G[3..0], " -> ", (B[3..0])d
|   Test     G[3..0]
|   End  }

Don't suppose you could tell us where that came from?

I used Orcad a long long  time ago.
The file comes from an old installation disk.
Unfortunately, there is no user manual on the disk, only example files
Are you able to zip and post the example files?
That would help the OP and any other ORCAD/PLD users.
 

Offline up8051

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  • Country: pl
Re: Attempting to identify mysterious PAL Hardware Description Language
« Reply #11 on: September 26, 2023, 07:23:38 pm »
Probably:
 ORCAD/PLD, ORCAD/PLD386+

Example from old Orcad Tutor:
Code: [Select]
                      GRAY CODE TO BINARY CONVERTER

A Gray code to binary converter is a progressive array of exclusive-or
gates judiciously interconnectely.  Here such a converter is defined as a
numerical map, forcing the PLD compiler to work out the detailed logic
itself.  The PLD compiler achieves exactly the same logic as the classical
exclusive-or array.  See Chapter 5 of the reference guide for a discussion
of maps.

|PAL16HD8 in:G[3..0], io:B[3..0]
|
|  Map:  G[3..0] -> B[3..0]  { Gray(n) -> n }

| Vectors:
| { Display (G[3..0])d, " = ", G[3..0], " -> ", (B[3..0])d
|   Test     G[3..0]
|   End  }

Don't suppose you could tell us where that came from?

I used Orcad a long long  time ago.
The file comes from an old installation disk.
Unfortunately, there is no user manual on the disk, only example files
Are you able to zip and post the example files?
That would help the OP and any other ORCAD/PLD users.

Orcad (DOS version) and all examples are available at:
https://groups.io/g/dosOrCAD
 
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