ICE40 Board Design review

[Omega Glory]

Hi, so I'm a senior in college and I recently designed an ICE40 development board. When I soldiered it up, the FPGA got quite hot and the supply voltage dipped. I removed the FPGA and tested the functionality of the rest of the components and everything appears to be fine. I was wondering if some of you would critique my design and perhaps give me hints as to where the fault might be.

A bit about the board:
Has an ICE40HX8K FPGA in a 121 pin 0.8mm pitch BGA package.
Has an FTDI 2232H which has been confirmed to be working.
Has 3.3v and 1.8v regulators.
Has an EEPROM for the FTDI chip, and a SPI flash memory for FPGA configuration.
The board is 4 layers and was manufactured by JLCPCB.

It's not a complicated design, so I'm mystified as to the cause of failure. After the FPGA was removed, the regulators were confirmed to be operational, and I was able to connect to the FTDI chip and confirm it worked as well. The fact that the FPGA got hot and the voltage rails dipped when powered on makes me think that there was some sort of short or near short. I don't know if that was because the FPGA was damaged, or because there was an error in the design.

My current theories are:
1. A flaw in the schematic/pcb
2. Incorrectly oriented the BGA on the PCB
3. Damaged the FPGA by heating it up too much or from ESD.

Attached is a picture of the board, the schematic, an image of the BGA and a screwdriver pointing to what I believe is pin 1, and a link to a GitHub repo holding the Kicad design files. If there is anything else I should include that would be helpful, please let me know.

https://github.com/ept221/pet-on-a-chip

[techman-001]

Nice looking layout!

I cant see anything obvious, but if I could, you would have already, so I only have a suggestion. I'd get out my multimeter/beeper and test every single  FPGA pad on the board to eliminate shorts (short out + and 0v supply first and connect one probe to this). Confirm the correct voltages are present with the board powered up. It might not find a problem but at least you can eliminate the usual suspects.

You never know if a microscopic sliver of copper from the manufacturing process is causing the issue. Forty years ago we would test our pcbs for this and if we found one, blow it apart with a big capacitor across the shorted lines.

Good luck

[asmi]

On the first glance, it looks like D8 ball is connected to 3.3V, while it should be connected to 1.2 V rail.

[asmi]

Also - as a general note, using LDO for 1.2 V rail in battery-powered application is a very bad idea, because you waste a ton of power to heat - LDO's efficiency is only about 1.2/3.3 = 36% Same goes for the first LDO, which could have even lower efficiency depending on Vin.
Use switched mode buck converters instead. By go-to device for up to 3 Amps of current is TLV62130 - it's cheap, easy to use, and can be powered by anything from 5 to 17 V.
And one more note - USB data signals are supposed to be routed as a differential pair. FT2232H is USB 2.0 HS device, so signal integrity is important.

[Omega Glory]

Thank you all so much! @asmi I cannot believe I missed that 1.8v supply issue, that is absolutely horrible  . I was worried about using a switching supply for the FPGA because I didn't want to introduce any high-frequency noise. I could add some sort of filter, but I didn't know how to quantify the noise and I don't know how much is acceptable.

[asmi]

Thank you all so much! @asmi I cannot believe I missed that 1.8v supply issue, that is absolutely horrible  . I was worried about using a switching supply for the FPGA because I didn't want to introduce any high-frequency noise. I could add some sort of filter, but I didn't know how to quantify the noise and I don't know how much is acceptable.

Don't worry! It happens to the best of us every once in a while!

As for noise - I used that specific DC-DC converter in many FPGA designs with no issues. Just make sure to follow layout recommendations from the datasheet and have all your traces away from switch node.

Also, while you're on it - you have some errors in connecting 2232 as well. See attached schematics from datasheet - I marked missing connection.

[asmi]

One more thing - this may or may not be a problem, but you have traces next to your mounting holes where screw head would land, which can scrape off soldermask and short data traces. So if you do plan to use metal screws to secure your board to something, you might want to move all traces away from where the head would be. If you mount your board in some other way, you shouldn't have this problem and you can disregard this note.

[asmi]

Annnd another note (this looks like a chat now ) - JLCPCB allows you to use 0.2/0.45 mm vias, you can use them under BGA - they will be smaller than what you use (0.254/0.508 mm) and should give more clearance from nearby pads, reducing your chances of getting a short during reflow.
Once you fix all issues, feel free to post an update here - and I and others will be happy to do a review to make sure you won't have to do a yet another respin of a board.

[Omega Glory]

Thank you very much, that is incredibly helpful and very kind! Because of time and budget constraints, I'm probably not going to incorporate the switching supply because I don't want to reorder a solder stencil, and I don't have a ton of time to put into layout. I realize that it won't be a great design, but at this point in the semester I just have to get it to work. I'll fix those issues with the FPGA supply voltage and the FTDI chip though. Also yeah I'm aware of the situation with the mounting holes and the screws scraping the solder mask. I will probably put some sort of spacer in the final solution to prevent shorting. And yes, I will certainly keep you updated!

[gnuarm]

Thank you very much, that is incredibly helpful and very kind! Because of time and budget constraints, I'm probably not going to incorporate the switching supply because I don't want to reorder a solder stencil, and I don't have a ton of time to put into layout. I realize that it won't be a great design, but at this point in the semester I just have to get it to work. I'll fix those issues with the FPGA supply voltage and the FTDI chip though. Also yeah I'm aware of the situation with the mounting holes and the screws scraping the solder mask. I will probably put some sort of spacer in the final solution to prevent shorting. And yes, I will certainly keep you updated!

There is no reason to use a switching power supply for every little voltage rail.  How much current do you expect to draw from the 1.2V rail?  Maybe a few 10's of mA?  Times 2V that is still very small losses and simply not worth the bother.  Linear regulators are simple and effective.  No reason to not use them for the low power drain devices.

[asmi]

There is no reason to use a switching power supply for every little voltage rail.  How much current do you expect to draw from the 1.2V rail?  Maybe a few 10's of mA?  Times 2V that is still very small losses and simply not worth the bother.  Linear regulators are simple and effective.  No reason to not use them for the low power drain devices.

Any loss is unacceptable for battery-powered designs. I wouldn't ever called LDOs "effective". Switchers, on the other hand, ARE simple and effective. Nowadays you can get even switchers with integrated inductors, so you barely need any external parts. Nowadays the only reason to use LDO is when you need extra-quiet power rails - and even that is combined with switcher pre-regulator to limit losses and increase efficiency. Remember that poor efficiency results not only in waste of power, but also increase heating, possibly requiring implementing some additional measures to deal with that.
In this design on the other side of PCB it says max current for 3.3 V rail is 2.1 Amps, and up to 10 V of Vin is acceptable, this leads to LDO dissipating (10 - 3.3) * 2.1 = 14.07 W of power!!! There is NO way this little LDO can handle that kind of heat load.

[asmi]

Thank you very much, that is incredibly helpful and very kind! Because of time and budget constraints, I'm probably not going to incorporate the switching supply because I don't want to reorder a solder stencil, and I don't have a ton of time to put into layout. I realize that it won't be a great design, but at this point in the semester I just have to get it to work.

I would strongly recommend you to reconsider this. As you can read in the post above that, in the worst case your 3.3 V LDO will have to dissipate over 14 W of power, and there is no way this package can handle anything even close to that.
Datasheet for the switcher I offered above contains layout example, so it should be very trivial, it also contains example components you can use to achieve 3.3 V and 1.2 V outputs.

[Omega Glory]

In my particular use case for this board, I'm using a 6V switching regulator to step down my battery voltage to supply the development board, and I estimate the current draw on the 3.3V rail to be around 600mA in the worst case, so using your calculation I get (6-3.3)*0.6 = 1.62 watts. My labeling of the maximum input voltage being 10V had to do with the capacitor voltage ratings on the input of the supply, and the 2.1 A output current came from the data sheet of the 3.3V regulator. I suppose that wasn't the best way to label things.

[gnuarm]

There is no reason to use a switching power supply for every little voltage rail.  How much current do you expect to draw from the 1.2V rail?  Maybe a few 10's of mA?  Times 2V that is still very small losses and simply not worth the bother.  Linear regulators are simple and effective.  No reason to not use them for the low power drain devices.

Any loss is unacceptable for battery-powered designs. I wouldn't ever called LDOs "effective". Switchers, on the other hand, ARE simple and effective. Nowadays you can get even switchers with integrated inductors, so you barely need any external parts. Nowadays the only reason to use LDO is when you need extra-quiet power rails - and even that is combined with switcher pre-regulator to limit losses and increase efficiency. Remember that poor efficiency results not only in waste of power, but also increase heating, possibly requiring implementing some additional measures to deal with that.
In this design on the other side of PCB it says max current for 3.3 V rail is 2.1 Amps, and up to 10 V of Vin is acceptable, this leads to LDO dissipating (10 - 3.3) * 2.1 = 14.07 W of power!!! There is NO way this little LDO can handle that kind of heat load.

That absolute preference for switchers is not an engineering decision, it is a personal preference not supported by facts.  An engineering decision would be supported by facts, not statements like, "Any loss is unacceptable for battery-powered designs".  Power consumption is a requirement to be met like any other.  Meet the requirement and the design is a success.  Absolute minimum is not a requirement and not considering the downside of switchers is not appropriate in a design process either.

That is right up there with a comment I once heard that resistors were to be avoided because they use power. 

[gnuarm]

In my particular use case for this board, I'm using a 6V switching regulator to step down my battery voltage to supply the development board, and I estimate the current draw on the 3.3V rail to be around 600mA in the worst case, so using your calculation I get (6-3.3)*0.6 = 1.62 watts. My labeling of the maximum input voltage being 10V had to do with the capacitor voltage ratings on the input of the supply, and the 2.1 A output current came from the data sheet of the 3.3V regulator. I suppose that wasn't the best way to label things.

How much current do you expect the FPGA core to consume?  Perhaps some are not aware that the iCE40 line are very low power.  You have to work pretty hard to get them to draw much current.  ASMI's comment was about generating the 1.2V supply from the 3.3V supply.  My experience is that this can be done with an SC-70 sized linear regulator without consideration of the current since both the current and voltage drop are so low.  The power dissipation will likely be less than an 0603 resistor is rated for.

[asmi]

In my particular use case for this board, I'm using a 6V switching regulator to step down my battery voltage to supply the development board, and I estimate the current draw on the 3.3V rail to be around 600mA in the worst case, so using your calculation I get (6-3.3)*0.6 = 1.62 watts. My labeling of the maximum input voltage being 10V had to do with the capacitor voltage ratings on the input of the supply, and the 2.1 A output current came from the data sheet of the 3.3V regulator. I suppose that wasn't the best way to label things.

That's still quite a lot, especially for battery-powered application - it literally is 100% waste, reducing battery life for no reason, and adding heating issues to the list of problems needs to be dealt with. So I would at least replace 3.3 V regulator with switcher.
Another thing - I see that you use 1117 LDO for 3.3 V rail, and some versions of them are known to be unstable when used with MLCCs, so you might want to take a close look at the datasheet of your specific device to see if it's designed to be used with MLCCs. There are many versions of that device, so it's hard to tell for sure.
Also I tend to avoid using electrolytic caps in favor of tantalum as they have lower Esr (equivalent series resistance), so large transients don't heat them up quite as much.
Oh, and NEVER choose a cap such that their its voltage rating is very close to a normal operating voltage - always maintain a healthy margin, otherwise a single voltage spike can kill tit. In reality this doesn't happen very often as actual Vmax is typically higher than datasheet value, but it CAN happen, and in DID happen in my experience. Believe me, you won't appreciate the fireworks which will ensue.

[Omega Glory]

Thank you, that is quite a lot to take into account. In my case I can afford poor efficiency because time and money are at an extreme priority. If I were to redo my power supply (which after reading your comments I see why I should), I would also have to buy a new solder stencil, and I can't afford that at the moment. To give you some context, my senior design project is creating a tiny SoC with a custom CPU, and peripherals including a GPU, hobby servo controller, closed loop motor controller, UART, counter/timers, and GPIO. I finished this portion of the project and also wrote an assembler in python to convert assembly to the custom machine code. You can see my post about the SoC here: https://www.eevblog.com/forum/projects/custom-soc-made-for-an-ice40-fpga-with-assembler/. In my senior project I would like to demonstrate the capabilities of this SoC by creating a replacement for my 70's technology robot pet: https://www.eevblog.com/forum/projects/1970_s-robot/. This project has been pretty involved and has covered a lot of different subject matters, but I'm now running out of time and money to finish it, which is why at this point I'm probably sticking with the wasteful design which is faster and cheeper for me to turn out at the moment (I'm taking 6 classes and TAing a 7th so I'm dying). After I graduate I will continue to work on FPGA projects and will most likely design a new dev board which incorporates the changes you have suggested.

p.s.
If you look at the GitHub repo for the SoC, checkout the readme in the branch new_isa. That version is significantly better, and once I iron everything out I will merge it into master.

Edit: new_isa has been merged into master.

[asmi]

That absolute preference for switchers is not an engineering decision, it is a personal preference not supported by facts.  An engineering decision would be supported by facts, not statements like, "Any loss is unacceptable for battery-powered designs".  Power consumption is a requirement to be met like any other.  Meet the requirement and the design is a success.  Absolute minimum is not a requirement and not considering the downside of switchers is not appropriate in a design process either.

The only use case I can justify using LDO for is when I need it's high PSRR. For everything else, switchers are superior.

That is right up there with a comment I once heard that resistors were to be avoided because they use power.

Don't be ridiculous.

[gnuarm]

That absolute preference for switchers is not an engineering decision, it is a personal preference not supported by facts.  An engineering decision would be supported by facts, not statements like, "Any loss is unacceptable for battery-powered designs".  Power consumption is a requirement to be met like any other.  Meet the requirement and the design is a success.  Absolute minimum is not a requirement and not considering the downside of switchers is not appropriate in a design process either.

The only use case I can justify using LDO for is when I need it's high PSRR. For everything else, switchers are superior.

Yes, trouble is the linear regulator PSRR is limited in frequency range which is something many don't seem to understand when they follow a switcher with a linear thinking the linear will cure all evils of the switcher.  Nothing could be further from the truth.  The only thing that will clean up switching regulator noise is careful filter design.  Often switching regulators have little to offer in a given application, such as this one where the current draw is so low. 

Although, I have seen a capacitance multiplier circuit that would have sufficient bandwidth to help. 

That is right up there with a comment I once heard that resistors were to be avoided because they use power.

Don't be ridiculous.

Exactly my point.  It's best to not be ridiculous and propose a single switching solution to all regulator problems, especially problems that don't exist.

[Omega Glory]

Hello again,

    I just wanted to say thanks to all of you, and particularly to asmi for catching that supply error in the schematic. I soldered up the new board and it works! I'm thrilled; this is my first board with a BGA and 0603 pitch components.

[gnuarm]

The Github link doesn't seem to work.  I'd like to review your Gerber files and your design rules.  It's looking like I'm going to need to design a board with a BGA FPGA and I want to start digging into details.

[Omega Glory]

Hey, sorry about that. I forgot that I had linked to the repo and deleted it. I re-uploaded the entire project with more info here: https://github.com/ept221/pet-on-a-chip. This link will be stable, and I'll correct the one in the previous post.

Edit: Just pushed gerbers in case you don't have Kicad.

[gnuarm]

Thanks.  I'm not conversant with github, so this will be a learning exercise for me.