Hi guys,
thanks for the many answers. Actually I would also prefer to configure the FPGA via a small microcontroller, but on the other hand I would need to include a USB port and also write a loader software, which I didn't plan. My microcontroller will for sure not have enough internal memory for the FPGA bitstream, so I would need to get it somehow into the serial flash... it kind of doesn't really solve the problem. This is why I wanted to use the USB blaster.
I was also thinking about switching to, e.g. Microsemi or so, but I have done my first experiments with Altera MAX7000 about 15 yrs ago, and then did some Altera stuff from time to time. Even with Xilinx, which I used only once, the learning curve will be a lot steeper, unfortunately, while Quartus hasn't changed that much since the first time I used it.
I've certainly used generic SPI flash in the past as a configuration device for Cyclone II. It would have been criminal not to; the prices of the EPCS parts are absolutely ridiculous, more than the FPGA itself in some cases.
Unfortunately that was a long time ago now, and the part I used is obsolete. ST haven't sold flash for years, and I've no idea what (if anything) is compatible that's still manufactured.
These days, when I do a design with an FPGA, I configure it using a microcontroller.
The prices and availability are exactly the reasons why I don't want to use the EPCS parts :-)
And if the generic part does work with Cyclone II, I wonder whether it also works with Cyclone 10?
Third, if I change my design to Cyclone 10 - is it still possible to use the same flash?
If you are considering switching FPGA family I would recommend the Spartan 6 instead. It supports Winbond SPI flash officially which are very cheap and easy to source. Last time I checked Spartan 6 is still the best bang for buck for medium-low capacity. If you need >50k LUTs I would go for Artix-7.
I had about 3 years of experience with Altera FPGAs and 0 with Xilinx. Purchased Zynq board and so far - the process of learning Vivado is relatively slow... Will see how it goes in general.
I also used Zynq once; however I am not sure whether I used Vivado or something else - but it was extremely complicated and slow. Too much for me ;-) and this is going to be a hobby project, so definitely no Zynq required here.
I've been using Cyclone-II successfully with various flash memories. As one type gets obsolete, I switch to another. However, number of options is rapidly decreasing. Please note that Cyclone-II is VERY mature product (at least from Alt.. ups - Intel's standpoint) so it is not supported by any newer version of Quartus. And yes, Altera programmers can program it in-circuit.
I moved some of designs to MAX10. It has internal flash that makes things simpler - so you do not need external memory anymore and that answers your last question.
Could you tell which flash memory you used the last time?
I had about 3 years of experience with Altera FPGAs and 0 with Xilinx. Purchased Zynq board and so far - the process of learning Vivado is relatively slow... Will see how it goes in general.
I started with Altera 5 years ago, I got a Terasic DE1-SoC board which has a Cyclone V socfpga (85K logic elements). Later when it came time to put an FPGA in a product I settled on the Spartan 6, and noted that all my designs achieved about the same Fmax on S6 compared to CV, even though S6 is one generation behind (45nm vs 28nm). Recently I finally got around to developing a custom Zynq-7010 board, and found that Fmax is much improved in the 7 series Zynq/Artix and sometimes almost twice what I can get on Altera Cyclone V. The Zynq-7010's FPGA is the same as Artix-7 and has the same datasheet specs.
So far, from what I can compare - Altera FPGAs have to be design constrained very well to achieve good frequencies. Now once that's done correctly - you can get decent speeds. E.g. I remember doing 270MHz oversampling logic with two 337.5MHz clocks on Cyclone II and it worked well. However, I had to constrain the input very well, placing the input flip flops exactly at the input pin blocks for sufficient performance... It seemed like for one input signal, I needed 20 lines in the SDC for a proper constraint.
Hmm I will definitely need a good speed. I plan to use one of the internal PLLs to run a counter at around 200 MHz - preferrably more if possible. According to the datasheet, this should be possible... I will soon get a Cyclone II board and can test it.