The "best" packages for a PCB designer are those that have the exposed center slug = GND and a surrounding ring of VCC/VDD etc pins around it.
EasyPeasy to decouple on the secondary side of the PCB using copper filled through-hole vias. Fan-out from such packages are really easy.
The prize for the worst package I have ever encountered was a BT chip (now long gone) from TI.
That BGA chip had the GND and other supply pins spread out all around the package making fan-out nearly impossible, not to mention
trying to acheive the shortest possible tracks to the decoupling capacitors.
For the foot print designers (such as myself), I can see which manufacturers that knows the pain we face and that they
present the foot print drawing in such a way that the drawing specifies pin pitch, pad dimensions and suggests suitable
pad dimensions, specifying _CENTER_ dimensions instead of airgaps.
![Banging Head |O](https://www.eevblog.com/forum/Smileys/default/bangheadonwall.gif)
To them: Kudos
To all other: Take a PCB design training class and learn how we work.